18

ADVANCE INFORMATION

83C196LC, 83C196LD — AUTOMOTIVE

5.4

AC Characteristics — Synchronous Serial Port

Figure 6. Synchronous Serial Port

Table 10. Synchronous Serial Port Timing

Symbol

Parameter

Min

Max

Units

T

CLCL

Synchronous Serial Port Clock period

TBD

TBD

ns

T

CLCH

Synchronous Serial Port Clock falling edge to

rising edge

TBD

TBD

ns

T

D

Setup time for MSB output

TBD

ns

T

CXDV

Setup time for D6:0 output

1.5t + 20

ns

T

CXDX

Output data hold after clock high

0.5t

ns

T

DVCX

Setup time for input data

10

ns

T

DXCX

Input data hold after clock high

t + 5

ns

MSB

D6

D5

D4

D3

D2

D1

D0

valid

valid

valid

valid

valid

valid

valid

valid

1

8

7

6

5

4

3

2

1

8

7

6

5

4

3

2

SC

x

(normal

transfers)

SD

x (out)

SD

x (in)

SC

x

(handshaking

transfers)

Slave Receiver Pulls SC

x low

A3233-02

STE Bit

Assumes that the SSIO is configured to sample incoming data on the rising clock edge and sample outgoing

data on the falling clock edge, and that the SSIO is configured to pull the clock signal low while the channel

is idle.

†

†