HIP6005CB datasheet(7/12 Pages) INTERSIL

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during operation could toggle the PGOOD signal and

exercise the overvoltage protection.

The DAC function is a precision non-inverting summation

ampliﬁer shown in Figure 5. The resistor values shown are

only approximations of the actual precision values used.

Grounding any combination of the VID pins increases the

DACOUT voltage. The ‘open’ circuit voltage on the VID pins

is the band gap reference voltage, 1.26V.

Application Guidelines

Layout Considerations

As in any high frequency switching converter, layout is very

important. Switching current from one power device to another

can generate voltage transients across the impedances of the

interconnecting bond wires and circuit traces. These

interconnecting impedances should be minimized by using

wide, short printed circuit traces. The critical components

should be located as close together as possible using ground

plane construction or single point grounding.

Figure 6 shows the critical power components of the

converter. To minimize the voltage overshoot the

interconnecting wires indicated by heavy lines should be part

of ground or power plane in a printed circuit board. The

components shown in Figure 6 should be located as close

together as possible. Please note that the capacitors CIN and

CO each represent numerous physical capacitors. Locate the

HIP6005 within 3 inches of the MOSFET, Q1. The circuit

traces for the MOSFETs gate and source connections from

the HIP6005 must be sized to handle up to 1A peak current.

Figure 7 shows the circuit traces that require additional

layout consideration. Use single point and ground plane

construction for the circuits shown. Minimize any leakage

current paths on the SS PIN and locate the capacitor, Css

close to the SS pin because the internal current source is

only 10

µA. Provide local VCC decoupling between VCC and

GND pins. Locate the capacitor, CBOOT as close as practical

to the BOOT and PHASE pins.

Feedback Compensation

Figure 8 highlights the voltage-mode control loop for a buck

converter. The output voltage (VOUT) is regulated to the

Reference voltage level. The error ampliﬁer (Error Amp)

output (VE/A) is compared with the oscillator (OSC)

triangular wave to provide a pulse-width modulated (PWM)

wave with an amplitude of VIN at the PHASE node. The

PWM wave is smoothed by the output ﬁlter (LO and CO).

The modulator transfer function is the small-signal transfer

function of VOUT/VE/A. This function is dominated by a DC

Gain and the output ﬁlter (LO and CO), with a double pole

break frequency at FLC and a zero at FESR. The DC Gain of

the modulator is simply the input voltage (VIN) divided by the

peak-to-peak oscillator voltage

∆VOSC.

Modulator Break Frequency Equations

1.26V

VID3

VID2

VID1

VID0

COMP

DACOUT

ERROR

AMPLIFIER

2.7k

Ω

1.7k

Ω

5.4k

Ω

10.7k

Ω

21.5k

Ω

2.9k

Ω

DAC

VID4

3.6k

Ω

12k

Ω

12k

Ω

BAND GAP

REFERENCE

FIGURE 5. DAC FUNCTION SCHEMATIC

UGATE

PHASE

VIN

VOUT

RETURN

HIP6005

CIN

FIGURE 6. PRINTED CIRCUIT BOARD POWER AND

GROUND PLANES OR ISLANDS

HIP6005

GND

VCC

BOOT

VOUT

PHASE

FIGURE 7. PRINTED CIRCUIT BOARD SMALL SIGNAL

LAYOUT GUIDELINES

+VIN

CBOOT

CVCC

CSS

+12V

•

---------------------------------------

ESR

•

()

•

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HIP6005

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