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HIP9010 Datasheet(PDF) 5 Page - Intersil Corporation

Part # HIP9010
Description  Engine Knock Signal Processor
PDF  12 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HIP9010 Datasheet(HTML) 5 Page - Intersil Corporation

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4-5
+5V
HIP9010
MICROPROCESSOR
SPI BUS
C3, 0.022
µF
C2, 3.3nF
C1, 3.3nF
R1
R4
R3
4MHz
A/D
CONVERTER
VDD
VMID
GND
S1IN
S1FB
S0IN
S0FB
OSCIN
OSCOUT
INTOUT
MOSI
MISO
SCK
CS
INT/HOLD
TEST
TRANSDUCERS
R2
FIGURE 2. SIMPLIFIED BLOCK DIAGRAM OF THE HIP9010 IN AN AUTOMOTIVE APPLICATION
20pF
20pF
1M
Pin Descriptions
PIN
NUMBER
SYMBOL
DESCRIPTION
1VDD
5V power input.
2
GND
This terminal is tied to ground.
3VMID
This terminal is tied to the internal mid-supply generator and is brought out for supply bypassing by a 0.022
µF
capacitor.
4
INTOUT
Buffered output of the integrator.
5 and 6
NC
These terminals are not internally connected. DO NOT USE.
7
INT/HOLD
Selects whether the chip is in the Integrate Mode (Input High) or in the Hold Mode (Input Low).
8
CS
A low input on this pin enables the chip to communicate over the SPI bus.
9
OSCIN
Input to inverter used for the oscillator circuit. A 4MHz crystal or ceramic resonator is connected between this
pin and pin 10. To bias the inverter, a 1.0M
Ω to 10MΩ resistor is usually connected between this pin and pin 10.
10
OSCOUT
Output of the inverter used for the oscillator. See pin 9 above.
11
MISO
Output of the chip SPI data bus. It is the inversion of the chip DATAIN line. This is an open drain output. The
output must be disabled by placing the CS High when the chip is not selected.
12
MOSI
Input of the chip SPI data bus. Data length is eight bits.
13
SCK
Input from the SPI clock. Normally high, the data is clocked to the chip internal circuitry on the rising clock edge.
14
TEST
A low on this pin places the chip in the test mode. For normal operation this terminal is tied high or left open.
15 and 16
NC
These terminals are not internally connected. DO NOT USE.
17
S1IN
Inverting input to sensor one amplifier. A resistor is tied from this summing input to the transducer. A second
resistor is tied between this terminal and terminal 18, S1FB to establish the gain of the amplifier.
18
S1FB
Output of the sensor one amplifier. This terminal is used to apply feedback.
19
S0FB
Output of the sensor zero amplifier. This terminal is used to apply feedback.
20
S0IN
Inverting input to sensor zero amplifier. A resistor is tied from this summing input to the transducer. A second
resistor is tied between this terminal and terminal 19, S0FB to establish the gain of the amplifier.
HIP9010



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