4-8

4. Integrator Time Constant: Defines the Integration Time

Constant for the system. The first 3 bits are used for the

address and the last 5 bits for the value. 110TTTTT

Example: 11000011 would be the integrator time

constant (110 on for the first 3 bits) and an integration

constant of 55

µs (bit value of 3 in Table 2).

5. Test/Channel Select/Channel Attenuate Control: This word

serves several purposes. By looking at the structure,

and the last 5 bits are used for the value. The options are:

- If CS is “0” channel “0” is selected. If CS is “1” channel “1”

is selected.

“1” attenuation applies to the reference filter.

all sections get their input from the output of the

antialiasing filter input. This input can come from either the

output of channel “0” amplifier or channel “1” output

test mode the chip is configured in its normal operating

state, getting inputs to all sections from previous sections.

different analog parts of the circuit. Table 1 shows these

combinations. All blocks except for the antialiasing filter are

sampled via the differential to single ended converter in the

test mode.

TABLE 1. SHOWING PROGRAMMING IN THE TEST MODE

TEST

PIN 14

ANALOG OUTPUT

FROM:

0

0000

Knock Rectifier

0

0001

Reference

0

0010

Knock Filter

0

0011

Reference Filter

0

0100

Antialias Filter(1)

0

0101

Antialias Filter(1)

0

0110

Integrator

0

0111

Integrator

0

1000

Knock Rectifier

0

1001

Reference

0

1010

Knock Filter

0

1011

Reference Filter

0

1100

Antialias Filter(1)

0

1101

Antialias Filter(1)

0

1110

Integrator

0

1111

Integrator

1

xxxx

Integrator

NOTE:

3. All Test function blocks have their outputs buffered by the differential

to single ended converter. Their outputs are available at the

INTOUT pin 4 of the chip. In the case of the antialias filter test

function, the output is taken directly to the INTOUT pin 4 of the chip.

FIGURE 4A. S0IN AND S1IN INPUT CIRCUIT

FIGURE 4B. MISO OUTPUT OF SPI DATA BUS IS AN OPEN

DRAIN TRANSISTOR

FIGURE 4C. TEST PMOS TRANSISTOR HAS EQUIVALENT

CURRENT PULLUP CAPABILITY OF A 50k TO

200k RESISTOR

FIGURE 4D. S0FB, S1FB AND INOUT EQUIVALENT OUTPUT

CIRCUITS

FIGURE 4. INTERFACE CIRCUITS

S0IN

S1IN

TO NEXT STAGE

HALF OF

DIFFERENTIAL

AMPLIFIER

MISO

11

TEST

14

TO LOGIC

50

µA

S0FB S1FB

INOUT

HIP9010