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UPD16602 Datasheet(PDF) 2 Page - NEC |
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UPD16602 Datasheet(HTML) 2 Page - NEC |
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2 / 16 page  2 µµµµPD16602 1. BLOCK DIAGRAM 4 4 4 R/L CLK SPR S/D DR0 to DR3 DG0 to DG3 DB0 to DB3 PL/NL HS BIAS1 BIAS2 12 26 Bi-directional shift register (26 circuits) 12 26 Level shifter (26 circuits) Sample & hold + output buffer circuit 12 26 SPL VDD1 VSS1 VDD2(D) VSS2(D) LPC VDD2(A) VCOM VSS2(A) VSS2(C) S1 S312 SAMPLE & HOLD + OUTPUT BUFFER CIRCUIT 1 DR0 to DR3 DG0 to DG3 DB0 to DB3 SPn PL/NL HS SW1 SW3 SW4 SW2 – + BIAS1 CH Sn (S/H)P – + BIAS2 CH (S/H)N |
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