Data Sheet S11950EJ2V0DS00

4

3. PIN FUNCTIONS

SYMBOL

PIN NAME

I/O

DESCRIPTION

Driver Output

These pins output scan signals that drive the vertical

direction (gate lines) of a TFT-LCD. The output signals

change in synchronization with the rising edge of shift

This is the input of the internal shift register. The input

date is read at the rising edge of shift clock CLK, and

STVR

STVL

Start Pulse Input/Output

This pin outputs a start pulse to the

µ PD16655 at the

next stage when two or more

µ PD16655s are connected

in cascade.

The pulse is output at the falling edge of the 240th clock

of shift clock CLK, and is cleared at the falling edge of the

241st clock.

R,/L

Shift Direction Select Input

R,/L = “H” (right shift): STVR

R,/L = “L” (left shift): STVL

CLK

Shift Clock Input

This pin inputs a shift clock to the internal shift register.

The shift operation is performed in synchronization with

the rising edge of this input.

OE

Output Enable Input

When this pin goes “H”, the driver output is fixed to “L”.

The shift register is not cleared, however. The internal

logic operates even when OE = “H”. OE is in

asynchronization with the clock.

Logic Positive Power Supply

10 V to 25 V

Driver Positive Power Supply

10 V to 25 V

Reference Positive Power

Supply

3.0 to 5.5 V Reference voltage to level shifter LS.

Reference Negative Power

Supply

Connect this pin to the ground of the system.

Logic Negative Power Supply

–21 V to –3 V

Driver Negative Power Supply

off power in the reverse order. These power up/down sequence must be observed also during

transition period.

2. Insert a capacitor of about 0.1

0.1 F

0.1 F

0.1 F