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AN2354 Datasheet(PDF) 7 Page - STMicroelectronics

Part # AN2354
Description  ST10 UART recommendations
PDF  21 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2354 Datasheet(HTML) 7 Page - STMicroelectronics

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AN2354
ST10 ASC peripherals
7/21
Figure 2.
Asynchronous 9-bit data frames
1.2.2
Asynchronous transmission
The ASCx module uses a modulo 16 counter clocked by fCPU / 2. A transmission begins at
the next overflow of this counter provided that SxR is set and data has been loaded into
SxTBUF. The transmitted data frame consists of three basic elements:
1.
the start bit
2.
the data field (8- or 9-bit, LSB first, including a parity bit, if selected)
3.
the delimiter (1- or 2-stop bit)
Data transmission is double-buffered. When the transmitter is idle, the transmit data loaded
into SxTBUF is immediately moved to the transmit shift register, thus freeing SxTBUF for the
next data to be sent.This is indicated by the transmit buffer interrupt request flag being set.
SxTBUF may now be loaded with the next data, while transmission of the previous one is
still going on.
The transmit interrupt request flag is set before the last bit of a frame is transmitted, that is,
before the first or the second stop bit is shifted out of the transmit shift register.
1.2.3
Asynchronous reception
A reception is initiated by a falling edge (1-to-0 transition) on pin RX, provided that bit SxR
and SxREN are set. The receive data input pin is sampled at 16 times the rate of the
selected baud rate. A majority decision of the 7th, 8th and 9th samples determines the
effective bit value. This avoids erroneous results that may be caused by noise.
Figure 3.
ASCx asynchronous mode interrupt generation
• Data bit D8
• Parity
• Wake-up bit
D2
D3
D4
D5
D7
D6
(1st)
Stop
bIt
2nd
Stop
bit
D1
D0
(LSB)
Start
bit
9th
bit



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