ST10 ASC peripherals

AN2354

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Table 1.

SxCON register description

Bit

Function

SxM

ASCx mode control

0 0 0:8-bit data - synchronous operation

0 0 1:8-bit data - synchronous operation

0 1 0:Reserved. Do not use this combination

0 1 1:7-bit data + parity - asynchronous operation

1 0 0:9-bit data - asynchronous operation

1 0 1:8-bit data + wake up bit - asynchronous operation

1 1 0:Reserved. Do not use this combination

1 1 1:8-bit data + parity - asynchronous operation

SxSTP

Number of stop bit selection asynchronous operation

0:One stop bit

1:Two stop bit

SxREN

Receiver enable bit

0:Receiver disabled

1:Receiver enabled

Reset by hardware after reception of byte in synchronous mode)

SxPEN

Parity check enable bit: asynchronous operation

0:Ignore parity

1:Check parity

SxFEN

Framing check enable bit - asynchronous operation

0:Ignore framing errors

1:Check framing errors

SxOEN

Overrun check enable bit

0:Ignore overrun errors

1:Check overrun errors

SxPE

Parity error flag

Set by hardware on a parity error (SxPEN=’1’). Must be reset by software.

SxFE

Framing error flag

Set by hardware on a framing error (SxFEN=’1’). Must be reset by software.

SxOE

Overrun error flag

Set by hardware on an overrun error (SxOEN=’1’). Must be reset by software.

SxODD

Parity selection bit

0:Even parity (parity bit set on odd number of ‘1’s in data)

1:Odd parity (parity bit set on even number of ‘1’s in data)

SxBRS

Baud rate selection bit

0:Divide clock by reload-value + constant (depending on mode)

1:Additionally reduce serial clock to 2/3rd

SxLB

Loopback mode enable bit

0:Standard transmit/receive mode

1:Loopback mode enabled

SxR

Baud rate generator run bit

0:Baud rate generator disabled (ASCx inactive)

1:Baud rate generator enabled