AN4092 datasheet(16/38 Pages) STMICROELECTRONICS

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Power Management Controller (PMC)

AN4092

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Doc ID 023080 Rev 2

1.5

Voltage fine tuning

The PMC_TRIMR (Trimming Register) enables the user to fine tune the voltage of the

regulators and the LVI thresholds.This register can be write protected by setting the

trimming lock bit in the PMC_MCR.

Caution:

Fine tuning may end-up in non-guaranteed operating conditions, please refer to the product

datasheet for the maximum operating conditions.

1.6

Stand-by RAM functionality

The SPC564Axx / SPC563Mxx include up to 192 KB of general-purpose SRAM. The first 32

KB of SRAM is powered by its own power supply pin during standby operation.

The Standby mode preserves contents of the standby portion of the memory when the 1.2 V

(VDD) power drops below the level of the standby power supply voltage. There are two

possible supplies for standby: 0.95-1.2 V directly from the VSTBY pin and 2 – 5.5 volts (also

on the VSTBY pin), which enables a standby regulator.

Updates to the standby portion of the SRAM are inhibited during system reset or during

Standby Mode.

1.6.1

SRAM Standby switch

The SRAM Standby Switch provides selection of standby power to the standby SRAM. The

switch selects between the core power supply VDD and an internal regulated voltage

generated from the VSTBY supply.

When VDD falls below 0.95V, the switching occurs and the RAM is on the standby supply. At

the same time, a power down signal is sent to the RAM to power it down to a safe mode

state.

Refer to section 1.5: Voltage fine tuning

Table 3.

Fine tuning parameters

Parameter

Min. (V)

Default (V)

Max (V)

LVI 5V trimming

4.13

4.29

4.43

VREG 3.3V trimming

3.15

3.39

3.60

LVI 3.3V trimming

2.93

3.09

3.23

VREG1.2V trimming

1.12

1.28

1.42

LVI 1.2V trimming

1.0

1.16

1.30

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