AN4092 datasheet(34/38 Pages) STMICROELECTRONICS

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Previous recommended PMC network configurations

AN4092

34/38

Doc ID 023080 Rev 2

Appendix A

Previous recommended PMC network

configurations

Figure 12 shows an old recommended configuration that was proven to be unstable in some

corner cases, especially with NJD2873.

Figure 12.

SPC563Mxx configuration/SPC564Axx configuration

However, when the ballast transistor in use is BCP68, this configuration is still safe to use

with SPC563Mxx. With a small modfification to the snubber network on the base (see

Figure 13), it is safe with NJD2873 too.

The configuration shown in Figure 12 must never be used in any SPC564Axx design.

Note:

Figure 12 is not present in last versions of Datasheet and Reference manual as it is

outdated (for further information see Section Appendix B: Further information).

MCU

Mandatory decoupling

capacitor network

VDDREG

VRCCTL

VDD

VSS

× 6.8 μF4 × 220 nF

680 nF

6.8-10

μF

1.1–5.6

μF

Resistor may or may not be

required. It depends on the

allowable power dissipation

of the npn bypass transistor

device.

Emitter and collector capacitors

(6.8

μF and 10 μF) should be

matched (same type) and ESR

should be lower than 200 m

Ω.

Notes:

1. The VRCCTL capacitor and resistor required.

2. The bypass transistor MUST be operated out of its saturation region.

GAPGRI00160

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