AN4043 datasheet(23/60 Pages) STMICROELECTRONICS

23 / 60 page

AN4043

Electrical characteristics and functions

Doc ID 022726 Rev 2

23/60

2.3.6

Short-circuit protection and smart shutdown function

The fully featured version of the SLLIMM-nano (STGIPN3H60) is able to monitor the output

current and provide protection against overcurrent and short-circuit conditions in a very

short time (comparator triggering to high/low-side driver turn-off propagation delay tisd =

200 ns), thanks to the smart shutdown function. This feature is based on an innovative

patented circuitry which provides an intelligent fault management operation and greatly

reduces the protection intervention delay independently on the protection time duration

which can be set as desired by the device user.

As already mentioned in

Section 2.3.5: Comparators for fault sensing and as shown in

Figure 9, the comparator input can be connected to an external shunt resistor, RSHUNT, in

order to implement a simple overcurrent detection function. An RC filter network (RSF and

CSF) is necessary to prevent erroneous operation of the protection. The output signal of the

comparator is fed to an integrated MOSFET with the open drain available on the SD / OD

pin, shared with the SD input. When the comparator triggers, the device is set in shutdown

state and all its outputs are set to low level, leaving the half bridge in tri-state. In common

overcurrent protection architectures, the comparator output is usually connected to the SD

input and an external RC network (RSD and CSD) is connected to this SD / OD line in order

to provide a mono-stable circuit which implements a protection time when a fault condition

occurs.

Contrary to common fault detection systems, the new smart shutdown structure allows an

immediate turn-off of the output gate driver in the case of fault, without waiting for the

external capacitor to be discharged. This strategy minimizes the propagation delay between

the fault detection event and the actual outputs switch-off. In fact, the time delay between the

fault and outputs disabling is not dependent on the RC value of the external SD circuitry but,

thanks to the new architecture, has a preferential path internally in the driver. Then the

device immediately turns off the driver outputs and latches the turn-on of the open drain

switch, until the SD signal has reached its lower threshold. After the SD signal goes below

the lower threshold, the open drain is switched off (see

Figure 15).

The smart shutdown system provides the possibility to increase the value of the external RC

network across the SD pin (sized to fix the disable time generated after the fault event) as

much as desired by the user without compromising the intervention time delay of the

SLLIMM-nano protection.

A block diagram of the smart shutdown architecture is depicted in

Figure 14.

AN4043 Datasheet(PDF) 23 Page - STMicroelectronics