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UPD4724 Datasheet(PDF) 1 Page - NEC |
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UPD4724 Datasheet(HTML) 1 Page - NEC |
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1 / 16 page ![]() © 1993 DATA SHEET MOS INTEGRATED CIRCUIT µPD4724 Document No. S12201EJ2V0DS00 (2nd edition) (Previous No. IC-3228) Date Published January 1997 N Printed in Japan RS-232 LINE DRIVER/RECEIVER AT 3.3 V/5 V The µPD4724 is a high breakdown voltage silicon gate CMOS line driver/receiver based on the EIA/TIA-232-E standard. This IC features various functions, such as standby, and incorporates a DC/DC converter that switches boost multiples, enabling operation at both +3.3 V and +5 V single supply voltage. The µPD4724 incorporates three drivers and five receivers, so an RS-232 interface circuit can be easily constructed by connecting five external capacitors. FEATURES • Based on EIA/TIA-232-E (RS-232-C) standard. • Single power supply: +3.3 V or +5 V (selectable with the VCHA pin) • Standby mode: Setting the standby pin to low level switches this IC into the standby mode and makes the driver outputs high-impedance. • Enable mode: When the enable pin is high level during the standby mode, two receivers can operate as inverters without hysteresis width (The other three receivers are fixed to high level). ORDERING INFORMATION Part number Package µPD4724GS-GJG 30-pin plastic shrink SOP (300 mil) |
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