6

LTC1545

TEST CIRCUITS

Figure 3. V.10/V.28 Driver Test Circuit

A

D

1545 F03

A

D

1545 F04

15pF

R

A

Figure 4. V.10/V.28 Receiver Test Circuit

(Note 1) (Note 2)

(Note 1)

(Note 3)

LTC1545 MODE NAME

M2

M1

M0

D1

D2

D3

D4

D5

R1

R2

R3

R4

R5

Not Used (Default V.11)

0

0

0

V.11

V.11

V.11

V.10

V.10

V.11

V.11

V.11

V.10

V.10

RS530A

0

0

1

V.11

V.10

V.11

V.10

V.10

V.11

V.10

V.11

V.10

V.10

RS530

0

1

0

V.11

V.11

V.11

V.10

V.10

V.11

V.11

V.11

V.10

V.10

X.21

0

1

1

V.11

V.11

V.11

V.10

V.10

V.11

V.11

V.11

V.10

V.10

V.35

1

0

0

V.28

V.28

V.28

V.28

V.28

V.28

V.28

V.28

V.28

V.28

RS449/V.36

1

0

1

V.11

V.11

V.11

V.10

V.10

V.11

V.11

V.11

V.10

V.10

V.28/RS232

1

1

0

V.28

V.28

V.28

V.28

V.28

V.28

V.28

V.28

V.28

V.28

D4ENB = 1, R4EN = 0

111ZZZZZZZZ

Z

Z

M0 = M1 = M2 = 1

ODE SELECTIO

Note 1: Driver 3 and Receiver 1 are enabled (and disabled) by

DCE/DTE (Pin 14). Logic high enables Driver 3. Logic low enables

Receiver 1.

Note 2: Driver 4 is enabled by D4ENB = 0 (Pin 15).

Note 3: Receiver 4 is enabled by R4EN = 1 (Pin 16).

SWITCHI G TI E WAVEFOR S

Figure 5. V.11 Driver Propagation Delays

5V

1.5V

1.5V

50%

10%

90%

0V

D

B – A

A

B

1545 F05

50%

10%

90%