UPD62AMC datasheet(23/62 Pages) NEC

23 / 62 page

µPD62A

Data Sheet U14474EJ1V0DS00

5.2 Standby Mode Setting and Release

The standby mode is set with the HALT #b3b2b1b0B instruction for both STOP mode and HALT mode. For the

standby mode to be set, the status flag (F) is required to have been cleared (to 0).

The standby mode is released by the release condition specified by the reset (RESET input; POC) or the HALT

instruction operand. If the standby mode is released, the status flag (F) is set (to 1).

Even when the HALT instruction is executed in a state in which the status flag (F) has been set (to 1), the standby

mode is not set. If the release condition is not met at this time, the status flag is cleared (to 0). If the release condition

is met, the status flag remains set (to 1).

Even in the case when the release condition has already been met at the point that the HALT instruction is

executed, the standby mode is not set. Here, also, the status flag (F) is set (to 1).

Caution Depending on the status of the status flag (F), the HALT instruction may not be executed. Be

careful about this. For example, when setting HALT mode after checking the key status with

the STTS instruction, because the system does not enter HALT mode as long as the status flag

(F) remains set (to 1), sometimes an unintended operation is performed. In this case, the

intended operation can be realized by executing the STTS instruction immediately after the

timer setting to clear (to 0) the status flag.

Example

STTS

#03H

;To check the KI pin status.

MOV

T, #0xxH

;To set the timer

STTS

#05H

;To clear the status flag

(During this time, be sure not to execute an instruction that may set the status flag.)

HALT

#05H

;To set HALT mode

Table 5-2. Addresses Executed After Standby Mode Release

Release Condition

Address Executed After Release

Reset

0 address

Release condition shown in Table 5-3

The address following the HALT instruction

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