AN2633 datasheet(35/48 Pages) STMICROELECTRONICS

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AN2633

Operating measurements

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3.2.4

How to test an example of power modes

Uncomment the selected clock source and frequency in the two files: main.c and

91x_lpmode.c

, if you are going to run a test in Normal Run mode and Idle mode. There

are 5 possibilities:

#define Clock_OSC

The source clock is the oscillator. Therefore, the system clock is set at 25 MHz.

The clock dividers are with their default values.

#define Clock_RTC

The source clock is the RTC. Therefore, the system clock is set at 32.768 KHz.

The clock dividers are with their default values.

#define Clock_PLL48

The source clock is the PLL with a system frequency of 48 MHz. All the clock

dividers are with their default values:

#define Clock_PLL66

The source clock is the PLL with a system frequency of 66 MHz. The clock

dividers are as follows:

APBDIV=2, AHBDIV=RCLKDIV=1 and fFMICLK=fRCLK=fBRCLK=fEMI_BCLK.

#define Clock_PLL96

configure the PLL as clock source. The system frequency is 96 MHz. The clock

dividers are as follows:

APBDIV=2, AHBDIV=RCLKDIV=1 and fFMICLK=fRCLK=fBRCLK=fEMI_BCLK.

For special interrupt mode tests, select either oscillator or PLL as clock source. For

sleep mode tests, select only oscillator as clock source.

Put the test number in the #define test number.

For example, to select LPMode_Idle_RTCAlarm_Periph_ON test you write:

#define Test_Number 18

AN2633 Datasheet(PDF) 35 Page - STMicroelectronics