AN2633 datasheet(41/48 Pages) STMICROELECTRONICS

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AN2633

Operating measurements

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Test 33: LPMode_Run_Special_Interrupt_FIQ

When you push a button connected to pin P7.4, the system enters Run mode with the

fRCLK=fMSTR/2 as frequency and P9.0 pin is toggled.

When a falling edge on EXINT group 0 line2 is detected, an interrupt is generated. To

indicate that the system is in Special Interrupt Run mode FIQ operating with fMSTR, a

LED connected to P9.1 pin is toggled. After servicing the interrupt routine, the MCU

3.2.10

Battery supply tests

Test 34: LPMode_Vbatt_SRAM_ON

In this test, The SRAM switches its supply from the internal VDD source to the VBATT pin

when the VDD and VDDQ voltage drops below that of the LVD threshold. In this test, the

SRAM is enabled.

Test 35: LPMode_Vbatt_SRAM_OFF

In this test, The SRAM switches its supply from the internal VDD source to the VBATT pin

when the VDD and VDDQ voltage drops below that of the LVD threshold. In this test, the

SRAM is disabled.

3.3

Measurements and typical values

For all measurements:

●

All peripherals are disabled except if explicitly mentioned.

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For measurements in Table 20:

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All I/O pins are configured in output push-pull 1 (to measure IDDQ).

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No I/O pads toggling (to measure IDDQ).

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For all measurements in Table 20, Table 21 and Table 22:

●

a crystal is connected to X1_CPU and X2_CPU.

Note:

All measurements are done on rev H silicon.

AN2633 Datasheet(PDF) 41 Page - STMicroelectronics