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AN2658 Datasheet(PDF) 8 Page - STMicroelectronics |
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AN2658 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 23 page ![]() Summary of features AN2658 8/23 Doc ID 14152 Rev 2 2 Summary of features Table 1. below summarizes the main features of the STM8 ADC. 2.1 Resolution The STM8 ADC converter has 10-bit resolution. A special extra feature of the STM8 is that, to read the conversion results faster, and if you can accept lower resolution; you can read only 8 of the 10 bits, provided that you select the appropriate register alignment. The register for configuring right or left data alignment is ADC_CR2. 2.2 Clock selection The A/D conversion speed is given by the ADC clock signal. This clock speed must be between 1 MHz and 4 or 6 MHz (refer to datasheet). The ADC clock frequency is selected by dividing the frequency of the master clock. The register for clock speed selection is ADC_CR1. Table 1. STM8 ADC features Feature STM8 ADC Resolution 10-bit Clock speed fADC = 1 to 4 or 6 MHz (refer to datasheet) Triggers Software, timer or external pin trigger Operating modes Single or continuous mode Conversion speed (14 clocks) 2.33 µs @ 6 MHz fADC Reference voltage VREF+ and VREF- external pins: 2.75 V ÷ VDDA range, analog zooming possible Note: In some packages VREF+ and VREF- are not available, in these cases the reference voltages are VDDA or VDD and VSSA or VSS) Number of input channels Up to 16 channels Data format Optional left or right alignment Buffers (1) 1. Available only on ADC1 (extended ADC type) Up to 16 data buffer registers (depending on the number of channels) Special functions (1) Scan mode, analog watchdog, buffer overrun flag, bandgap reference voltage channel |
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