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UM0116 Datasheet(PDF) 22 Page - STMicroelectronics |
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UM0116 Datasheet(HTML) 22 Page - STMicroelectronics |
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22 / 27 page ![]() Flash memory protection UM0116 22/27 3.4.2 Flash NV access protection register 0 (FLASH_NVAPR0) Address offset: 0x10 DFB8 Delivery value: 0x3569 ACFFh 1) Not available in STR75x. 2) Not available in STR71x and STR73x. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 76 5432 1 0 Reserved DEBUG 1) READ OUT2) rw rw Bit 31:2 Reserved, always read as 0. Bit 1 DEBUG: Debug Protection. If this bit is erased to 1, protections are by-passed and the Flash is accessible through its JTAG interface. If DEBUG is programmed at 0 the device is DEBUG protected, the JTAG interface is disabled. Note: In STR73x devices, when debug protection is enabled, the SystemMemory Mode is also disabled. Note: If this bit is programmed to ‘0’, STMicroelectronics will not be able to access the device to run a possible failure analysis. Bit 0 READOUT: Readout Protection. If this bit is erased to 1, protections are by-passed and the Flash is accessible through its JTAG interface. If READOUT is programmed at 0 the device is READOUT protected, the JTAG interface is disabled. Note: If this bit is programmed to ‘0’, STMicroelectronics will not be able to access the device to run a possible failure analysis. |
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