Flash module organization

UM0116

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Flash module organization

The on-chip Flash is divided in 2 banks that can be read and modified independently one

from the other: one bank can be read while another bank is being modified.

Table 1 shows the Flash Module Organization, while Table 2 shows the Control Register

interface, with the registers that can be addressed by the CPU.

Table 1.

Flash module organization

Bank

Sector

Addresses (Offset)

Size (bytes)

Bank 0

256 Kbytes

Program Memory

+

Bank 0 Flash Sector 0 (B0F0)

0x00 0000 - 0x00 1FFF

8K

Bank 0 Flash Sector 1 (B0F1)

0x00 2000 - 0x00 3FFF

8K

Bank 0 Flash Sector 2 (B0F2)

0x00 4000 - 0x00 5FFF

8K

Bank 0 Flash Sector 3 (B0F3)

0x00 6000 - 0x00 7FFF

8K

Bank 0 Flash Sector 4 (B0F4)

0x00 8000 - 0x00 FFFF

32K

Bank 0 Flash Sector 5 (B0F5)

0x01 0000 - 0x01 FFFF

Bank 0 Flash Sector 6 (B0F6)

0x02 0000 - 0x02 FFFF

Bank 0 Flash Sector 7 (B0F7)

0x03 0000 - 0x03 FFFF

Bank 1

16 Kbytes

Bank 1 Flash Sector 0 (B1F0)

0x0C 0000 - 0x0C 1FFF

8K

Bank 1 Flash Sector 0 (B1F1)

0x0C 2000 - 0x0C 3FFF

8K

Not available in 128K versions.

2)

Not available in 64K versions.

3)

Not available in STR73x.

4)

Available only in STR73x and STR75x.

Table 2.

Control and Protection Register Interface

Name

Description

Addresses

Size

FLASH_CR1-0

Flash Control Registers 1-0

0x10 0000 - 0x10 0007 2 x 32-bit

FLASH_DR1-0

Flash Data Registers 1-0

0x10 0008 - 0x10 000F 2 x 32-bit

FLASH_AR

Flash Address Register

0x10 0010 - 0x10 0013

32-bit

FLASH_ER

Flash Error Register

0x10 0014 - 0x10 0017

32-bit

FLASH_NVWPR

Non Volatile Write Protection Register

0x10 DFB0 - 0x10

DFB3

32-bit

FLASH_NVAPR1-

0

Non Volatile Access Protection Register 0-1

0x10 DFB8 - 0x10

DFBF

2 x 32-bit