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AN4434 Datasheet(PDF) 14 Page - STMicroelectronics |
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AN4434 Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 17 page ![]() Data retention AN4434 14/17 DocID025810 Rev 3 filters out extrinsic defaults and pushes the data retention limit far beyond the limit of the first extrinsic failing bit. If we use the same analysis detailed in ECCx4 and data retention, the probability P2 that a second bit could be located in the same byte is equal to : P2 knP0 2 k1 – () 64 ⁄ = Where: – k is the number of bits of the word (for ECCx1: 1 bytes and 4 ECC bits, this leads to k = 12) – n is the number of bits of the whole memory. –P0 is the probability that 1 cell fails (P0 = 10-7) As the value of P2 is depending on the value of n (number of bits in the EEPROM), Table 7 offers the probability P2 that one byte is not read correctly (a second bit failing in the same byte cannot be recovered by the ECC logic). 2.3 Data retention strategy in the end application The data retention time is defined in the datasheets with specific temperatures. In order to ensure the safest EEPROM data retention, it is wise to evaluate the amount of time during which the end application remains within some temperature range to evaluate the data retention profile, that is: Number of years at temp i () Max Number of years specified for temp i () ------------------------------------------------------------------------------------ 1 ≤ i1 = n ∑ • define the time (in year) during which the EEPROM remains inside each temperature range (that is a typical temperature profile of the end application), • for each temperature range, estimate the data retention value, in percentage, as defined in the following equation or in Table 7. Table 6. ECCx1 memories: probability that one byte is not correctly read Memory capacity P2 (ppm(1)) 1. ppm: part per million 16 Kbit 0.001 8 Kbit 0.001 4 Kbit 0.000 2 Kbit 0.000 1 Kbit 0.000 |
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