UPD72871F1 datasheet(38/48 Pages) NEC

38 / 48 page

Preliminary Data Sheet S13925EJ2V0DS00

µµµµPD72870,72871

(6) W_GENERAL register (Base address + 0x950 - 0x95C)

W_GENERAL_0 (Base address + 0x950) - W_GENERAL_3 (Base address + 0x95C)

Field

Bits

R/W

Default value

Description

W_GENERAL_0 -

W_GENERAL_3

31-0

R/W

Undefined

User define value. The value is loaded into GENERAL_registerA - D in

Configuration register (Offset+70H - 7BH).

(7) W_PHYS register (Base address + 0x960)

- 0 -

- 1 -

W_aPhyEnhanceEnable

W_programPhyEnable

Field

Bits

R/W

Default value

Description

31-10

Reserved. Write 0 to these bits.

W_programPhyEnable

R/W

programPhyEnable bit. The bit is loaded into HCControl registers in OHCI

Please refer to the 1394 Open Host Controller Interface Specification/Release

1.0 [5.7].

1: P1394a enhancement is supported.

0. P1394a enhancement is not supported.

W_aPhyEnhanceEnable

R/W

aPhyEnhanceEnable bit. The bit is loaded into HCControl registers in OHCI

7-3

Reserved. Write 0 to these bits.

2-0

Reserved. Write 1 to these bits.

(8) W_CIS register (Base address + 0x980 - 0x984)

W_CIS_EVEN (Base address + 0x980) - W_CIS_ODD (Base address + 0x984)

Field

Bits

R/W

Default value

Description

W_CIS_EVEN -

W_CIS_ODD

31-0

R/W

Undefined

CIS Area value. The value is loaded into CIS Area in Configuration register

(Offset+80H - FCH).

UPD72871F1 Datasheet(PDF) 38 Page - NEC

UPD72871F1 Datasheet(HTML) 38 Page - NEC

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL