UPD75116F datasheet(49/78 Pages) NEC

49 / 78 page

µPD75108F,75112F,75116F

0.95

µs

1.91

µs

MHz

275

kHz

0.48

µs

1.8

µs

0.8

µs

0.95

µs

3.2

µs

3.8

µs

0.4

µs

tKCY/2 – 50

1.6

µs

tKCY/2 – 150

300

1000

VDD = 4.5 to 5.0 V

Input

VDD = 4.5 to 5.0 V

Output

Input

Output

Input

VDD = 4.5 to 5.0 V

Output

Input

Output

VDD = 4.5 to 5.0 V

AC CHARACTERISTICS (Ta = –40 to +50

°C, VDD = 2.7 to 5.0 V)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN.

TYP.

MAX.

UNIT

fTI

tTIH,

tTIL

tCY

tKSI

tSIK

tKSO

100

400

TI0, TI1 input

frequency

TI0, TI1 input high/

low-level width

tKCY

SCK cycle time

SCK high/low-level

width

tKH,

tKL

SI setup time

(to SCK

↑)

SI hold time

(from SCK

↑)

SO output delay

time from SCK

↓

INT0 to INT4

High/low-level width

RESET low-level

width

tINTH,

tINTL

tRSL

µs

CPU clock cycle time*

(Minimum instruction

execution time = 1

machine cycle)

UPD75116F Datasheet(PDF) 49 Page - NEC

UPD75116F Datasheet(HTML) 49 Page - NEC

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