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LT1187CS8 Datasheet(PDF) 8 Page - Linear Technology

Part # LT1187CS8
Description  Low Power Video Difference Amplifier
PDF  12 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LT1187CS8 Datasheet(HTML) 8 Page - Linear Technology

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LT1187
8
APPLICATIO S I FOR ATIO
The primary use of the LT1187 is in converting high speed
differential signals to a single-ended output. The LT1187
video difference amplifier has two uncommitted high input
impedance (+) and (–) inputs. The amplifier has another
set of inputs which can be used for reference and feed-
back. Additionally, this set of inputs give gain adjust and
DC control to the difference amplifier. The voltage gain of
the LT1187 is set like a conventional operational amplifier.
Feedback is applied to pin 8, and it is optimized for gains
of 2 or greater. The amplifier can be operated single-ended
by connecting either the (+) or (–) inputs to the +/REF (pin
1). The voltage gain is set by the resistors: (RFB + RG)/RG.
Like the single-ended case, the differential voltage gain is
set by the external resistors: (RFB + RG)/RG. The maximum
input differential signal for which the output will respond
is approximately
±0.38V.
Power Supply Bypassing
The LT1187 is quite tolerant of power supply bypassing.
In some applications a 0.1
µF ceramic disc capacitor
placed 1/2 inch from the amplifier is all that is required. In
applications requiring good settling time, it is important to
use multiple bypass capacitors. A 0.1
µF ceramic disc in
parallel with a 4.7
µF tantalum is recommended.
Calculating the Output Offset Voltage
Both input stages contribute to the output offset voltage at
pin 6. The feedback correction forces balance in the input
stages by introducing an Input VOS at pin 8. The complete
expression for the output offset voltage is:
VOUT = (VOS + IOS(RS) + IB(RREF)) × (RFB+RG)/RG + IB(RFB)
RS represents the input source resistance, typically 75Ω,
and RREF represents the finite source impedance from the
DC reference voltage, for VREF grounded, RREF = 0Ω. The
IOS is normally a small contributor and the expression
simplifies to:
VOUT = VOS(RFB+RG)/RG + IB(RFB)
If RFB is limited to 1k the last term of the equation
contributes only 2mV, since IB is less than 2µA.
ILT1187 • AI02
+ 1 REF
RREF
RG
8
RFB
6
350
µA
Q3
Q4
+
3
RS
345
µA
Q1
Q2
–
2
RS
7V +
RE
1.1k
RE
1.1k
4V –
Figure 1. Simplified Input Stage Schematic
V +
7
6
LT1187
V –
4
1
8
OUT
V
+
3
–
2
IN
V
S/D
5
AV = +
RFB +
RFB
7
6
LT1187
4
1
8
OUT
V
+
3
–
2
IN DIFF
V
S/D
5
RFB
LT1187 • AI01
7
6
LT1187
4
+/REF
1
–/FB
8
OUT
V
+
3
–
2
S/D
5
VO =
RFB +
RFB
7
6
LT1187
4
1
8
OUT
V
+
3
–
2
IN
V
S/D
5
AV = –
RFB +
RFB
IN
V
IN
V
(
( VIN DIFF
RFB
( ( VIN
+/REF
–/FB
+/REF
–/FB
+/REF
–/FB
RG
RG
RG
VO = (V
RFB +
IN DIFF + VIN)
RG
RG
RG
IN DIFF
V
RG
RG
RG
RG
–
RG
RG
RG
V +
V –
V +
V –
V +
V –



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