9

LT1187

APPLICATIO S I FOR ATIO

Operating with Low Closed-Loop Gains

The LT1187 has been optimized for closed-loop gains of

2 or greater. For a closed-loop gain of 2 the response

peaks about 2dB. Peaking can be eliminated by placing a

capacitor across the feedback resistor, (feedback zero).

This peaking shows up as time domain overshoot of

about 25%.

Closed-Loop Voltage Gain vs Frequency

Small-Signal Transient Response

Small-Signal Transient Response

Extending the Input Range

Figure 1 shows a simplified schematic of the LT1187. In

normal operation the REF pin 1 is grounded or taken to a

DC offset control voltage and differential signals are ap-

plied between pins 2 and 3. The input responds linearly

until all of the 345

µA current flows through the 1.1k

resistor and Q1 (or Q2) turns off. Therefore the maximum

tial pair, Q3 and Q4, is running at slightly larger current so

that when the first input stage limits, the second stage

remains biased to maintain the feedback.

Occasionally it is necessary to handle signals larger than

to ground pin 3 and apply the differential input signal

between pin 1 and 2. The input signal is now applied

across two 1.1k resistors in series. Since the input signal

is applied to both input pairs, the first pair will run out of

bias current before the second pair, causing the amplifier

to go open-loop. The results of this technique are shown

in the following scope photo.

FREQUENCY (Hz)

9

LT1187 • AI03

100M

10M

1M

100k

7

5

–1

1

3

0

2

4

6

8

LT1187 • AI04

LT1187 • AI05