UPD75218 datasheet(8/62 Pages) NEC

8 / 62 page

µPD75218

I/O

Dual-

function pin

Function

After reset

FIP controller/

driver output

pins.

Pull-down

resistor can

be incorpo-

rated in bit

units (mask

option).

T0 to T9

T10/S15 to

T13/S12

Output

–––

PH3 to PH0

Low level

(with an on-

chip pull-

down

resistor ) or

high

impedance

(without a

pull-down

resistor)

3.2

NON-PORT PINS

Output pins with high withstand voltage

and high current also used for digit/seg-

ment output

Extra pins can be used as PORTH.

Output pins with high withstand voltage

and high current for digit output

T14/S11,

T15/S10

–––

Output pins with high withstand voltage

and high current also used for digit/

segment output

Static output also possible.

S0 to S8

High withstand-voltage output for segment

output. Static output also possible.

High withstand-voltage output for segment

output

High

impedance

PPO

Output

Input

–––

Timer/pulse generator pulse output

External event pulse input for timer/event counter

P13

Serial clock input/output

TI0

SCK

Serial data output or serial data input/output

Serial data input or normal input

Edge-detected vectored interrupt input (rising and falling

edge detection).

INT0

INT1

INT4

Input/output

Input

P01

P02

P03

P00

P10

P11

Edge-detected vectored interrupt input with noise

elimination function (detection edge selection possible).

Edge-detected testable input (rising edge detection).

Fixed frequency output (for buzzer or system clock

trimming).

Input

Input/output

P12

P23

BUZ

Input

–––

Input

Input/output

INT2

Crystal/ceramic connection pin for main system clock

oscillation.

External clock input to X1 and its inverted clock input to

X2.

Crystal connection pin for subsystem clock oscillation.

External clock input to XT1. Leave XT2 open.

XT1

Input

FIP controller/driver output buffer power supply.

FIP controller/driver pull-down resistor connection pin.

XT2

–––

System reset input (low level active).

RESET

VPRE

Input

–––

Positive power supply.

VLOAD

VDD

–––

GND potential.

–––

VSS

–––

Note

The circuit-type codes enclosed in circles indicate that the corresponding circuits have a Schmitt-triggered

input.

–––

Input / output

circuit typeNote

–––

UPD75218 Datasheet(PDF) 8 Page - NEC

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