UPD754144GS datasheet(13/88 Pages) NEC

13 / 88 page

µPD754144, 754244

4. SWITCHING FUNCTION BETWEEN MK I MODE AND MK II MODE

4.1 Difference between Mk I and Mk II Modes

The

µPD754244 75XL CPU has the following two modes: Mk I and Mk II, either of which can be selected. The

mode can be switched by the bit 3 of the Stack Bank Select register (SBS).

• Mk I mode:

Instructions are compatible with the 75X series. Can be used in the 75XL CPU with a ROM

capacity of up to 16 Kbytes.

• Mk II mode:

Incompatible with 75X series. Can be used in all the 75XL CPU’s including those products

whose ROM capacity is more than 16 Kbytes.

Table 4-1. Differences between Mk I Mode and Mk II Mode

Mk I Mode

Mk II Mode

Number of stack bytes

2 bytes

3 bytes

for subroutine instructions

BRA !addr1 instruction

Not available

Available

CALLA !addr1 instruction

CALL !addr instruction

3 machine cycles

4 machine cycles

CALLF !faddr instruction

2 machine cycles

3 machine cycles

Caution The Mk II mode supports a program area exceeding 16 Kbytes for the 75X and 75XL Series.

Therefore, this mode is effective for enhancing software compatibility with products that

have a program area of more than 16 Kbytes.

With regard to the number of stack bytes during execution of subroutine call instructions,

the usable area increases by 1 byte per stack compared to the Mk I mode when the Mk II

mode is selected.

However, when the CALL !addr and CALLF !faddr instructions are used, the machine cycle

becomes longer by 1 machine cycle. Therefore, if more emphasis is placed on RAM use

efficiency and processing performance than on software compatibility, the Mk I mode

should be used.

UPD754144GS Datasheet(PDF) 13 Page - NEC