LTC1197CS8 datasheet(19/28 Pages) LINER

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LTC1197/LTC1197L

LTC1199/LTC1199L

APPLICATI

I FOR ATIO

The effective resolution of the LTC1197/LTC1197L can be

increased by reducing the input span of the converter. The

LTC1197/LTC1197L exhibits good linearity and gain over

a wide range of reference voltages (see typical curves of

Linearity and Full-Scale Error vs Reference Voltage). How-

ever, care must be taken when operating at low values of

VREF because of the reduced LSB step size and the

resulting higher accuracy requirement placed on the con-

verter. The following factors must be considered when

operating at low VREF values.

1. Offset

2. Noise

3. Conversion speed (CLK frequency)

Offset with Reduced VREF

The offset of the LTC1197/LTC1197L has a larger effect on

the output code when the ADC is operated with reduced

reference voltage. The offset (which is typically a fixed

voltage) becomes a larger fraction of an LSB as the size of

the LSB is reduced. The typical curve of LTC1197 Offset

Error vs Reference Voltage shows how offset in LSBs is

related to reference voltage for a typical value of VOS. For

example, a VOS of 1mV which is 0.2LSB with a 5V reference

becomes 1LSB with a 1V reference and 5LSBs with a 0.2V

reference. If this offset is unacceptable, it can be corrected

digitally by the receiving system or by offsetting the “–”

input of the LTC1197/LTC1197L.

Noise with Reduced VREF

The total input referred noise of the LTC1197/LTC1197L

can be reduced to approximately 200

µV peak-to-peak

using a ground plane, good bypassing, good layout tech-

niques and minimizing noise on the reference inputs. This

noise is insignificant with a 5V reference but will become

a larger fraction of an LSB as the size of the LSB is reduced.

For operation with a 5V reference, the 200

µV noise is

only 0.04LSB peak-to-peak. In this case, the LTC1197/

LTC1197L noise will contribute virtually no uncertainty

to the output code. However, for reduced references, the

noise may become a significant fraction of an LSB and

cause undesirable jitter in the output code. For example,

with a 1V reference, this same 200

µV noise is 0.2LSB

peak-to-peak. This will reduce the range of input volt-

ages over which a stable output code can be achieved. If

the reference is further reduced to 200mV, the 200

µV of

noise becomes equal to 1LSB and a stable code may be

difficult to achieve. In this case averaging readings may

be necessary.

This noise data was taken in a very clean setup. Any setup-

induced noise (noise or ripple on VCC, VREF or VIN) will add

to the internal noise. The lower the reference voltage to be

used, the more critical it becomes to have a clean, noise-

free setup.

Conversion Speed with Reduced VREF

With reduced reference voltages the LSB step size is

reduced and the LTC1197/LTC1197L internal comparator

overdrive is reduced. Therefore, it may be necessary to

reduce the maximum CLK frequency when low values of

VREF are used.

Input Divider

It is OK to use an input divider on the reference input of the

LTC1197/LTC1197L as long as the reference input can be

made to settle within the bit time at which the clock is

running. When using a larger value resistor divider on the

reference input the “–” input should be matched with an

equivalent resistance.

Bypassing Reference Input with Divider

Bypassing the reference input with a divider is also pos-

sible. However, care must be taken to make sure that the

DC voltage on the reference input will not drop too much

below the intended reference voltage.

LTC1197CS8 Datasheet(PDF) 19 Page - Linear Technology

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