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LTC1604C Datasheet(PDF) 6 Page - Linear Technology

Part # LTC1604C
Description  High Speed, 16-Bit, 333ksps Sampling A/D Converter with Shutdown
PDF  20 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1604C Datasheet(HTML) 6 Page - Linear Technology

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LTC1604
TYPICAL PERFORMANCE CHARACTERISTICS
INPUT FREQUENCY (Hz)
1k
80
70
60
50
40
30
20
10
0
10k
100k
1604G09
1M
Input Common Mode Rejection
vs Input Frequency
INPUT FREQUENCY (Hz)
1k
0
–20
–40
–60
–80
–100
–120
10k
100k
1M
1604 G07
fSAMPLE = 333kHz
VRIPPLE = 10mV
VSS
AVDD
Power Supply Feedthrough vs
Ripple Frequency
PIN FUNCTIONS
AIN
+ (Pin 1): Positive Analog Input. The ADC converts the
difference voltage between AIN
+ and AIN– with a differen-
tial range of
±2.5V. AIN+ has a ±2.5V input range when
AIN
– is grounded.
AIN
– (Pin 2): Negative Analog Input. Can be grounded, tied
to a DC voltage or driven differentially with AIN
+ .
VREF (Pin 3):2.5V Reference Output. Bypass to AGND with
2.2
µF tantalum in parallel with 0.1µF ceramic.
REFCOMP (Pin 4): 4.375 Reference Compensation Pin.
Bypass to AGND with 47
µF tantalum in parallel with 0.1µF
ceramic.
AGND (Pins 5 to 8): Analog Grounds. Tie to analog ground
plane.
DVDD (Pin 9): 5V Digital Power Supply. Bypass to DGND
with 10
µF tantalum in parallel with 0.1µF ceramic.
DGND (Pin 10): Digital Ground for Internal Logic. Tie to
analog ground plane.
D15 to D0 (Pins 11 to 26): Three-State Data Outputs. D15
is the Most Significant Bit.
BUSY (Pin 27): The BUSY output shows the converter
status. It is low when a conversion is in progress. Data is
valid on the rising edge of BUSY.
OGND (Pin 28): Digital Ground for Output Drivers.
OVDD (Pin 29): Digital Power Supply for Output Drivers.
Bypass to OGND with 10
µF tantalum in parallel with 0.1µF
ceramic.
RD (Pin 30): Read Input. A logic low enables the output
drivers when CS is low.
CONVST (Pin 31): Conversion Start Signal. This active
low signal starts a conversion on its falling edge when CS
is low.
CS (Pin 32): The Chip Select Input. Must be low for the
ADC to recognize CONVST and RD inputs.
SHDN (Pin 33): Power Shutdown. Drive this pin low with
CS low for nap mode. Drive this pin low with CS high for
sleep mode.
VSS (Pin 34): – 5V Negative Supply. Bypass to AGND with
10
µF tantalum in parallel with 0.1µF ceramic.
AVDD (Pin 35): 5V Analog Power Supply. Bypass to AGND
with 10
µF tantalum in parallel with 0.1µF ceramic.
AVDD (Pin 36): 5V Analog Power Supply. Bypass to AGND
with 10
µF tantalum in parallel with 0.1µF ceramic and
connect this pin to Pin 35 with a 10
Ω resistor.
Intermodulaton Distortion
FREQUENCY (kHz)
020
80
100
0
–20
–40
–60
–80
–100
–120
–140
1604 G06
40
60
160
120 140
fSAMPLE = 333kHz
fIN1 = 29.3kHz
fIN2 = 32.4kHz



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