LTC6945_15 datasheet(12/28 Pages) LINER

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LTC6945

6945fa

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Figure 5. Simplified Charge Pump Schematic

CHARGE PUMP

The charge pump, controlled by the PFD, forces sink

(DOWN) or source (UP) current pulses onto the CP pin,

which should be connected to an appropriate loop filter.

SeeFigure5forasimplifiedschematicofthechargepump.

as for loops using negative-slope tuning oscillators, or

invertingopampsinconjunctionwithpositive-slopetuning

oscillators. A passive loop filter as shown in Figure 15,

used in conjunction with a positive-slope VCO, requires

CPINV = 0.

CHARGE PUMP FUNCTIONS

The charge pump contains additional features to aid

in system start-up and monitoring. See Table 6 for a

summary.

Table 6. CP Function Bit Descriptions

BIT

DESCRIPTION

CPCHI

Enable High Voltage Output Clamp

CPCLO

Enable Low Voltage Output Clamp

CPDN

Force Sink Current

CPINV

Invert PFD Phase

CPMID

Enable Mid-Voltage Bias

CPRST

Reset PFD

CPUP

Force Source Current

CPWIDE

Extend Current Pulse Width

THI

High Voltage Clamp Flag

TLO

Low Voltage Clamp Flag

The CPCHI and CPCLO bits found in register h0A enable

the high and low voltage clamps, respectively. When

CPCHI is enabled and the CP pin voltage exceeds ap-

proximately VCP+ – 0.9V, the THI status flag is set, and

the charge pump sourcing current is disabled. Alternately,

when CPCLO is enabled and the CP pin voltage is less

than approximately 0.9V, the TLO status flag is set, and

the charge pump sinking current is disabled. See Figure

5 for a simplified schematic.

The CPMID bit also found in register h0A enables a

resistive VCP+/2 output bias which may be used to pre-

bias troublesome loop filters into a valid voltage range

before attempting to lock the loop. When using CPMID,

it is recommended to also assert the CPRST bit, forcing

a PFD reset. Both CPMID and CPRST must be set to “0”

for normal operation.

The CPUP and CPDN bits force a constant ICP source or

sink current, respectively, on the CP pin. The CPRST bit

may also be used in conjunction with the CPUP and CPDN

THI

0.9V

VCP+

TLO

+–

0.9V

6945 F05

+–

VCP+/2

CPMID

CPUP

CPDN

DOWN

TheoutputcurrentmagnitudeICPmaybesetfrom250µAto

11.2mA using the CP[3:0] bits found in serial port register

h09. A larger ICP can result in lower in-band noise due to

the lower impedance of the loop filter components. See

Table 5 for programming specifics and the Applications

Information section for loop filter examples.

Table 5. CP[3:0] Programming

CP[3:0]

ICP

250µA

350µA

500µA

700µA

1.0mA

1.4mA

2.0mA

2.8mA

4.0mA

5.6mA

8.0mA

11.2mA

12 to 15

Invalid

The CPINV bit found in register h0A should be set for ap-

plications requiring signal inversion from the PFD, such

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