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MRF157 Datasheet(PDF) 6 Page - Tyco Electronics |
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MRF157 Datasheet(HTML) 6 Page - Tyco Electronics |
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6 / 7 page ![]() Gate Voltage Rating — Never exceed the gate voltage rating. Exceeding the rated VGS can result in permanent damage to the oxide layer in the gate region. Gate Termination — The gates of these devices are es- sentially capacitors. Circuits that leave the gate open–cir- cuited or floating should be avoided. These conditions can result in turn–on of the devices due to voltage build–up on the input capacitor due to leakage currents or pickup. Gate Protection — These devices do not have an internal monolithic zener diode from gate–to–source. The addition of an internal zener diode may result in detrimental effects on the reliability of a power MOSFET. If gate protection is re- quired, an external zener diode is recommended. IMPEDANCE CHARACTERISTICS Device input and output impedances are normally obtained by measuring their conjugates in an optimized narrow band test circuit. These test circuits are designed and constructed for a number of frequency points depending on the frequency cover- age of characterization. For low frequencies the circuits consist of standard LC matching networks including variable capacitors for peak tuning. At increasing power levels the output imped- ance decreases, resulting in higher RF currents in the matching network. This makes the practicality of output impedance mea- surements in the manner described questionable at power lev- els higher than 200–300 W for devices operated at 50 V and 150–200 W for devices operated at 28 V. The physical sizes and values required for the components to withstand the RF currents increase to a point where physical construction of the output matching network gets difficult if not impossible. For this reason the output impedances are not given for high power de- vices such as the MRF154 and MRF157. However, formulas like (VDS – Vsat)2 2Pout for a single ended design or 2((VDS – Vsat) 2) Pout for a push–pull design can be used to obtain reasonably close approximations to actual values. MOUNTING OF HIGH POWER RF POWER TRANSISTORS The package of this device is designed for conduction cooling. It is extremely important to minimize the thermal re- sistance between the device flange and the heat dissipator. If a copper heatsink is not used, a copper head spreader is strongly recommended between the device mounting sur- faces and the main heatsink. It should be at least 1/4 ″ thick and extend at least one inch from the flange edges. A thin layer of thermal compound in all interfaces is, of course, es- sential. The recommended torque on the 4–40 mounting screws should be in the area of 4–5 lbs.–inch, and spring type lock washers along with flat washers are recommended. For die temperature calculations, the ∆ temperature from a corner mounting screw area to the bottom center of the flange is approximately 5 °C and 10°C under normal operat- ing conditions (dissipation 150 W and 300 W respectively). The main heat dissipator must be sufficiently large and have low Rθ for moderate air velocity, unless liquid cooling is employed. CIRCUIT CONSIDERATIONS At high power levels (500 W and up), the circuit layout be- comes critical due to the low impedance levels and high RF currents associated with the output matching. Some of the components, such as capacitors and inductors must also withstand these currents. The component losses are directly proportional to the operating frequency. The manufacturers specifications on capacitor ratings should be consulted on these aspects prior to design. Push–pull circuits are less critical in general, since the ground referenced RF loops are practically eliminated, and the impedance levels are higher for a given power output. High power broadband transformers are also easier to de- sign than comparable LC matching networks. EQUIVALENT TRANSISTOR PARAMETER TERMINOLOGY Collector Drain . . . . . . . . . . . . . . . . . Emitter Source . . . . . . . . . . . . . . . . . Base Gate . . . . . . . . . . . . . . . . . V(BR)CES V(BR)DSS . . . . . . . . . . . . . . . . . VCBO VDGO . . . . . . . . . . . . . . . . . IC ID . . . . . . . . . . . . . . . . . . . . . . ICES IDSS . . . . . . . . . . . . . . . . . IEBO IGSS . . . . . . . . . . . . . . . . . VBE(on) VGS(th) . . . . . . . . . . . . . . . . . VCE(sat) VDS(on) . . . . . . . . . . . . . . . . . Cib Ciss . . . . . . . . . . . . . . . . . Cob Coss . . . . . . . . . . . . . . . . . hfe gfs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RCE(sat) = VCE(sat) IC RDS(on) = VDS(on) ID 6 REV 1 |
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