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SZM-3166Z Datasheet(PDF) 7 Page - RF Micro Devices |
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SZM-3166Z Datasheet(HTML) 7 Page - RF Micro Devices |
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7 / 12 page ![]() 7 of 12 DS110620 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. SZM-3166Z Pin Function Description 5, 7, 11, 12, 17, 18, 22, 29, 31, 33, 34, 39, 40 NC These are no connect (NC) pins and are not wired inside the package. It is recommended to connect them as shown in the application circuit to achieve the stated performance. 1, 10, 21, 30 GND These pins are internally grounded inside the package to the backside ground paddle. It is recommended to also ground them external to the package to achieve the specified performance. 2VC1 This is the collector of the first stage. 3VBIAS12 This is the supply voltage for the active bias circuit of the 1st and 2nd stages. 4NC This pin is not connected inside the package, but it is recommended to connect it to GND to achieve the specified per- formance. 6RF IN This is the RF input pin. It is DC grounded inside the package. Do not apply DC voltage to this pin. 8VPC1 Power up/down control pin for the 1st stage. An external series resistor is required for proper setting of bias levels depending on control voltage. The voltage on this pin should never exceed the voltage on pin 3 by more than 0.5V unless the supply current from pin 3 is limited <10mA. 9VPC2 Power up/down control pin for the 2nd stage. Power down VPC2<1V for step attenuator functionable. An external series resistor is required for proper setting of bias levels depending on control voltage. The voltage on this pin should never exceed the voltage on pin 3 by more than 0.5V unless the supply current from pin 3 is limited <10mA. 13, 38 VC2A, VC2B These two pins are connected internal to the package to the 2nd stage collector. To achieve specified performance, the layout of these pins should match the Recommended Land Pattern. 14, 15, 36, 37 C1A,C2A C1B,C2B These pins have capacitors across them internal to the package as shown in the below schematic. They are used as tuning and RF coupling elements between the 2nd and 3rd stage. 16, 35 VB3A, VB3B These are the connections to the base of the 3rd stage output device. To achieve specified performance, the layout of these pins should match the Recommended Land Pattern. 19 VPC3 Power up/down control pin for the 3rd stage. An external series resistor is required for proper setting of bias levels depending on control voltage. The voltage on this pin should never exceed the voltage on pin 32 by more than 0.5V unless the supply current from pin 33 is limited <10mA. 20 VDET This is the output port for the power detector. It samples the power at the input of the 3rd stage. 23-28 RF OUT These are the RF output pins and DC connections to the 3rd stage collector. 32 VBIAS3 This is the supply voltage for the active bias circuit of the 3rd stage. |
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