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AN92584 Datasheet(PDF) 3 Page - Ramtron International Corporation |
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AN92584 Datasheet(HTML) 3 Page - Ramtron International Corporation |
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3 / 42 page ![]() Designing for Low Power and Estimating Battery Life for BLE Applications www.cypress.com Document No. 001-92584 Rev. *A 3 Table 1. System Clocks Clock Source Frequency System Requirements System Constraints APIs IMO 3 MHz -48 MHz Used to run the CPU and all other peripherals Either the IMO or ECO is required to run the CPU. The CPU must use the IMO while performing flash write operations. ON – CySysClkImoStart() OFF – CySysClkImoStop() ECO 24 MHz Used by BLE subsystem (BLESS) for packet transmissions and reception. Can also be used to run the CPU Either the IMO or ECO is required to run the CPU. ON – CySysClkEcoStart() OFF – CySysClkEcoStop() WCO 32 kHz Used by BLESS to maintain link timing. Can also be used to run the watchdog timer Either the WCO or ILO is required to run the watchdog timer. ON – CySysClkWcoStart() OFF – CySysClkWcoStop() ILO 32 kHz Can be used to run the watchdog timer if WCO is not available The ILO cannot be used for BLESS link timing. ON – CySysClkIloStart() OFF – CySysClkIloStop() 2.2 System Power Modes PSoC 4/PRoC BLE devices support five system power modes. Table 2 summarizes these modes, their currents, active components, wakeup sources, and the APIs available to put the system into one of the low-power modes. Table 2. System Power Modes System Power Mode Current Consumption Code Execution RAM Available Digital Peripherals Available Analog Peripherals Available Clock Sources Available Wakeup Sources Wakeup Time Wakeup State API Active 850 µA + 260 µA per MHz Yes ON All All All – – – – Sleep 850 µA + 60 µA per MHz No Retention All All All Any interrupt source 0 Active CySysPmSleep() Deep- Sleep 1.3 µA No Retention WDT 1, LCD 2, SCB(I 2C/SPI only), BLESS 3 LP Comparator, CTBm 11, POR 4, BOD 5 WCO 6, ILO 7 LP Comparator, GPIO 8, CTBm, BLESS 3, WDT, SCB 9 25 µs Active CySysPmDeepSleep() Hibernate 150 nA No Retention No LP Comparator, POR, BOD None LP Comparator, GPIO 2 ms Chip Reset CySysPmHibernate() Stop 60 nA No OFF No No None WAKEUP, XRES 10 pins 2 ms Chip Reset CySysPmStop() 1 Watchdog timer 2 Liquid crystal display 3 BLE subsystem 10 External reset 4 Power-on reset 5 Brownout detect 6 32-kHz watch crystal oscillator 11 Continuous time block mini 7 32-kHz internal low-speed oscillator 8 General-purpose input/output 9 Serial communication block |
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