+5V, Low-Power, 12-Bit Serial ADCs

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5

TIMING CHARACTERISTICS

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Track/Hold Acquisition Time

CS = high (Note 7)

1.5

µs

SCLK Fall to Output Data Valid

MAX18_ _C/E

20

150

ns

MAX18_ _M

20

200

CS Fall to Output Enable

100

ns

CS Rise to Output Disable

100

ns

SCLK Clock Frequency

5

MHz

SCLK Pulse Width High

100

ns

SCLK Pulse Width Low

100

ns

SCLK Low to

CS Fall

50

ns

Setup Time

CS Pulse Width

500

ns

Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has

been calibrated.

Note 3: MAX187—internal reference, offset nulled; MAX189–external +4.096V reference, offset nulled. Excludes reference errors.

Note 4: Guaranteed by design. Not subject to production testing.

Note 5: External load should not change during conversion for specified ADC accuracy.

Note 6: DC test, measured at 4.75V and 5.25V only.

time needed for the signal to be acquired.