As the load current decreases, the modulator pole also

decreases; however, the modulator gain increases

accordingly, and the closed-loop unity-gain frequency

remains the same. Below is a numerical example to cal-

cuit of Figure 4, where:

Ω

Ω

0.01] = 1.59 MHz.

Pick a closed-loop unity-gain frequency (fc) of 50kHz.

The power modulator gain at fc is:

then:

≈ 62kΩ

≈ 680pF

Applications Information

PC Board Layout

Careful PC board layout is critical to achieve clean and

stable operation. The switching power stage requires

particular attention. Follow these guidelines for good

PC board layout:

1) Place decoupling capacitors as close to IC pins as

possible. Keep power ground plane (connected to

PGND) and signal ground plane (connected to

GND) separate. Connect the two ground planes

together with a single connection from PGND to

GND.

2) Input and output capacitors are connected to the

power ground plane; all other capacitors are con-

nected to signal ground plane.

3) Keep the high-current paths as short and wide as

possible.

4) If possible, connect IN, LX1, LX2, and PGND sepa-

rately to a large land area to help cool the IC to fur-

ther improve efficiency and long-term reliability.

5) Ensure all feedback connections are short and

direct. Place the feedback resistors as close to the

IC as possible.

6) Route high-speed switching nodes away from sen-

sitive analog areas (FB1, FB2, COMP1, COMP2).

Chip Information

TRANSISTOR COUNT: 5428

PROCESS: BiCMOS

Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-

Down Regulator with POR and RSI/PFO

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