IR2125 datasheet(2/17 Pages) IRF

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IR2125(S) & (PbF)

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Symbol

Definition

Min.

Max.

Units

High Side Floating Supply Voltage

-0.3

525

High Side Floating Offset Voltage

VB - 25

VB + 0.3

VHO

High Side Floating Output Voltage

VS - 0.3

VB + 0.3

VCC

Logic Supply Voltage

-0.3

VIN

Logic Input Voltage

-0.3

VCC + 0.3

VERR

Error Signal Voltage

-0.3

VCC + 0.3

VCS

Current Sense Voltage

VS - 0.3

VB + 0.3

dVs/dt

Allowable Offset Supply Voltage Transient

—

V/ns

Package Power Dissipation @ TA ≤ +25°C (8 lead PDIP)

—

1.0

(16 lead SOIC)

—

1.25

RthJA

Thermal Resistance, Junction to Ambient

(8 lead PDIP)

—

125

(16lLead SOIC)

—

100

Junction Temperature

—

150

Storage Temperature

-55

150

Lead Temperature (Soldering, 10 seconds)

—

300

Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-

eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured

under board mounted and still air conditions.

Symbol

Definition

Min.

Max.

Units

High Side Floating Supply Voltage

VS + 12

VS + 18

High Side Floating Offset Voltage

Note 1

500

VHO

High Side Floating Output Voltage

VCC

Logic Supply Voltage

VIN

Logic Input Voltage

VCC

VERR

Error Signal Voltage

VCC

VCS

Current Sense Signal Voltage

Ambient Temperature

-40

125

°C

Note 1: Logic operational for VS of -5 to +500V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip

DT97-3 for more details).

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the

recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.

°C/W

°C

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