MAX5041AEAI datasheet(22/26 Pages) MAXIM

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Dual-Phase, Parallelable, Average-Current-Mode

Controllers

______________________________________________________________________________________

Selecting higher switching frequencies reduces the

inductance requirement, but at the cost of lower efficien-

cy. The charge/discharge cycle of the gate and drain

capacitances in the switching MOSFETs create switching

losses. The situation worsens at higher input voltages,

since switching losses are proportional to the square of

input voltage. Use 500kHz per phase for VIN = +5V and

250kHz or less per phase for VIN > +12V.

Although lower switching frequencies per phase increase

the peak-to-peak inductor ripple current (

∆IL), the ripple

cancellation in the multiphase topology reduces the RMS

ripple current of the input and output capacitors.

Use the following equation to determine the minimum

inductance value:

Choose

∆IL equal to about 40% of the output current

per phase. Since

∆IL affects the output-ripple voltage,

the inductance value may need minor adjustment after

choosing the output capacitors for full-rated efficiency.

Choose inductors from the standard high-current,

surface-mount inductor series available from various

manufacturers. Particular applications may require cus-

tom-made inductors. Use high-frequency core material

for custom inductors. High

∆IL causes large peak-to-peak

flux excursion increasing the core losses at higher fre-

quencies. The high-frequency operation coupled with

high

∆IL, reduces the required minimum inductance

and even makes the use of planar inductors possible.

The advantages of using planar magnetics include low-

profile design, excellent current-sharing between phas-

es due to the tight control of parasitics, and low cost.

For example, calculate the minimum inductance at

VIN(MAX) = +13.2V, VOUT = +1.8V,

∆IL = 10A, and fSW =

250kHz:

The average-current-mode control feature of the

MAX5038A/MAX5041A limits the maximum peak induc-

tor current and prevents the inductor from saturating.

Choose an inductor with a saturating current greater

than the worst-case peak inductor current.

Use the following equation to determine the worst-case

inductor current for each phase:

where RSENSE is the sense resistor in each phase.

Switching MOSFETs

When choosing a MOSFET for voltage regulators,

consider the total gate charge, RDS(ON), power dissipa-

tion, and package thermal impedance. The product of

the MOSFET gate charge and on-resistance is a figure of

merit, with a lower number signifying better performance.

Choose MOSFETs optimized for high-frequency switch-

ing applications.

The average current from the MAX5038A/MAX5041A

gate-drive output is proportional to the total capacitance

it drives from DH1, DH2, DL1, and DL2. The power dissi-

pated in the MAX5038A/MAX5041A is proportional to the

input voltage and the average drive current. See the VIN

and VCC section to determine the maximum total gate

charge allowed from all the driver outputs combined.

The gate charge and drain capacitance (CV2) loss, the

cross-conduction loss in the upper MOSFET due to finite

rise/fall time, and the I2R loss due to RMS current in the

MOSFET RDS(ON) account for the total losses in the MOS-

FET. Estimate the power loss (PDMOS_) in the high-side

and low-side MOSFETs using following equations:

where QG, RDS(ON), tR, and tF are the upper-switching

MOSFET’s total gate charge, on-resistance at +25°C,

rise time, and fall time, respectively:

where D = VOUT/VIN, IDC = (IOUT -

∆IL)/2, and IPK =

(IOUT +

∆IL)/2.

RMS HI

− =+

()×

MOS HI

OUT

DS ON

RMS HI

−

=×

()+

××

()×











 +×

()

L PEAK

SENSE

0 051

∆

MIN =

−

()×

××

=µ

13 2 1 8

1 8

13 2 250

MIN

INMAX

OUT

−

()×

×× ∆

(13)

(14)

(15)

(16)

(17)

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