87974CYI

www.idt.com

REV. E JULY 26, 2010

9

ICS87974I

As in any high speed analog circuitry, the power supply

pins are vulnerable to random noise. The ICS87974I

provides separate power supplies to isolate any high

switching noise from the outputs to the internal PLL. V

V

power supply plane through vias, and bypass capacitors

should be used for each pin. To achieve optimum jitter

performance, power supply isolation is required.

Figure 1

illustrates how a 10

Ω resistor along with a 10μF and a .01μF

bypass capacitor should be connected to each V

The 10

Ω resistor can also be replaced by a ferrite bead.

10

Ω

V

DDA

10

μF

.01

μF

3.3V

.01

μF

V

DD

For applications not requiring the use of a clock input, it can

be left floating. Though not required, but for additional

protection, a 1k

Ω resistor can be tied from the CLK input to

ground.

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional

protection. A 1k

Ω resistor can be used.

All unused LVCMOS output can be left floating. We

recommend that there is no trace attached.