Electronic Components Datasheet Search
  English  ▼

X  

MAX5177BEEE Datasheet(PDF) 3 Page - Maxim Integrated Products

Part # MAX5177BEEE
Description  Low-Power, Serial, 12-Bit DACs with Force/Sense Voltage Output
PDF  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX5177BEEE Datasheet(HTML) 3 Page - Maxim Integrated Products

  MAX5177BEEE Datasheet HTML 1Page - Maxim Integrated Products MAX5177BEEE Datasheet HTML 2Page - Maxim Integrated Products MAX5177BEEE Datasheet HTML 3Page - Maxim Integrated Products MAX5177BEEE Datasheet HTML 4Page - Maxim Integrated Products MAX5177BEEE Datasheet HTML 5Page - Maxim Integrated Products MAX5177BEEE Datasheet HTML 6Page - Maxim Integrated Products MAX5177BEEE Datasheet HTML 7Page - Maxim Integrated Products MAX5177BEEE Datasheet HTML 8Page - Maxim Integrated Products MAX5177BEEE Datasheet HTML 9Page - Maxim Integrated Products Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 16 page
background image
Low-Power, Serial, 12-Bit DACs with
Force/Sense Voltage Output
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS—MAX5175 (continued)
(VDD = +5V ±10%, VREF = 2.5V, AGND = DGND, FB = OUT, RL = 5kΩ, CL = 100pF referenced to ground, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C.)
CONDITIONS
V/µs
0.6
SR
Voltage Output Slew Rate
V
0
VDD
Output Voltage Swing (Note 3)
µA
-0.1
0
0.1
Current into FB
µs
40
Time Required to Exit Shutdown
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
CS = VDD; fSCLK = 100kHz, VSCLK = 5Vp-p
nV-s
1
Digital Feedthrough
V
4.5
5.5
VDD
Positive Supply Voltage
mA
0.26
0.35
IDD
Power-Supply Current (Note 4)
µA
110
Shutdown Current (Note 4)
ns
100
tCP
SCLK Clock Period
ns
40
tCH
SCLK Pulse Width High
ns
40
tCL
SCLK Pulse Width Low
ns
40
tCSS
CS Fall to SCLK Rise Setup
Time
ns
40
tDS
SDI Setup Time
ns
0
tDH
SDI Hold Time
CLOAD = 200pF
ns
80
tDO1
SCLK Rise to DOUT Valid
Propagation Delay
CLOAD = 200pF
ns
80
tDO2
SCLK Fall to DOUT Valid
Propagation Delay
ns
10
tCS0
SCLK Rise to CS Fall Delay
ns
100
tCSW
CS Pulse Width High
ns
0
tCSH
SCLK Rise to CS Rise Hold
Time
ns
40
tCS1
CS Rise to SCLK Rise Hold Time
To ±0.5LSB, from 10mV to full-scale
µs
12
Output Settling Time
DYNAMIC PERFORMANCE
POWER SUPPLIES
TIMING CHARACTERISTICS



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com