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MAX533BEEE Datasheet(PDF) 3 Page - Maxim Integrated Products

Part # MAX533BEEE
Description  2.7V, Low-Power, 8-Bit Quad DAC with Rail-to-Rail Output Buffers
PDF  16 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX533BEEE Datasheet(HTML) 3 Page - Maxim Integrated Products

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2.7V, Low-Power, 8-Bit Quad DAC
with Rail-to-Rail Output Buffers
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V, VREF = 2.5V, AGND = DGND = 0V, RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted.
Typical values are at VDD = +3V and TA = +25°C.)
MAX533M
MAX533C/E
VREF = 0.5Vp-p, 3dB bandwidth
To 1/2LSB, from code 00 to code FF hex
(Note 5)
CODE = FF hex
VREF = 2.5Vp-p at 10kHz
VREF = 2.5Vp-p at 1kHz, VDD = 3V,
code = FF hex
ISINK = 1.6mA
VIN = 0V or VDD
(Note 4)
Code 80 hex to code 7F hex
ISOURCE = TBDmA
VREF = 0V, code 00 to code FF hex (Note 6)
CONDITIONS
µA
110
Shutdown Current
mA
0.68
1.5
IDD
Supply Current
0.68
1.3
V
2.7
3.6
VDD
Power-Supply Voltage
POWER SUPPLIES
µVRMS
60
Wideband Amplifier Noise
kHz
380
Multiplying Bandwidth
-62
SINAD
Signal-to-Noise Plus
Distortion Ratio
dB
-70
nV-s
50
Digital-to-Analog Glitch Impulse
nV-s
5
Digital Feedthrough and
Crosstalk
V
0.3VDD
VIL
Input Low Voltage
V
0.7VDD
VIH
DIGITAL INPUTS
Input High Voltage
µs
6
Output Settling Time
V/µs
0.6
Voltage-Output Slew Rate
DYNAMIC PERFORMANCE
V
0.4
VOL
Output Low Voltage
µA
±1.0
IIN
Input Current
pF
10
CIN
Input Capacitance
DIGITAL OUTPUTS
V
VDD - 0.5
VOH
Output High Voltage
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
TIMING CHARACTERISTICS
(VDD = +2.7V to +3.6V, VREF = 2.5V, AGND = DGND = 0V, CDOUT = 100pF, TA = TMIN to TMAX, unless otherwise noted.
Typical values are at VDD = +3V and TA = +25°C.)
MAX533C/E
MAX533M
MAX533C/E
40
20
ns
50
25
tLDAC
LDAC Pulse Width Low
MAX533C/E
MAX533M
MAX533M
MAX533C/E
40
20
CONDITIONS
ns
50
25
tCLW
CLR Pulse Width Low
MAX533M
40
ns
50
tCLL
CS Rise to LDAC Fall Setup
Time (Note 7)
50
µs
60
tVDCS
VDD Rise to CS Fall Setup Time
(Note 4)
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
MAX533C/E
MAX533M
90
ns
100
tCSW
CS Pulse Width High



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