+2.5V to +5.5V, Low-Power, Single/Dual,

8-Bit Voltage-Output DACs in µMAX Package

10

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Table 2. MAX548A Serial-Interface Programming Commands (continued)

COMMANDS FOR POWERING DOWN

X

1

X

0

X

1

0

CONTROL BYTE

8-Bit DAC Data

X

Load DAC B input register and power down DAC

B. DAC A registers unchanged.

X

X

1

X

0

X

1

1

8-Bit DAC Data

X

Load both DAC input registers and power down

both DACs. Both DAC registers unchanged

X

X

1

X

1

0

1

0

8-Bit DAC Data

X

Load DAC B input register, power down DAC B,

and update both DAC registers. DAC A input

register unchanged.

X

X = Don’t care

X

1

X

1

0

0

1

8-Bit DAC Data

X

Load DAC A input register, power down DAC A,

and update both DAC registers. DAC B input

register unchanged.

X

X

1

X

0

X

0

1

8-Bit DAC Data

X

Load DAC A input register and power down DAC

A. DAC B registers unchanged.

X

X

1

X

1

0

1

1

8-Bit DAC Data

X

Load both DAC input registers, power down both

DACs, and update both DAC registers.

X

X

1

X

1

1

0

1

8-Bit DAC Data

0

Load DAC A input register, power down

DAC A, and update both DAC registers. DAC B

input register unchanged.

X

X

1

X

1

1

1

0

8-Bit DAC Data

0

Load DAC B input register, power down

DAC B, and update both DAC registers. DAC A

input register unchanged.

X

X

1

X

1

1

1

1

8-Bit DAC Data

0

Load both DAC input registers and power down

both DACs. Update both DAC registers.

X

X

1

X

1

1

0

1

8-Bit DAC Data

1

Load DAC A input register and power down DAC

A. While powered down, on LDAC’s falling edge,

update both DAC registers. DAC B input register

unchanged.

X

X

1

X

1

1

1

0

8-Bit DAC Data

1

Load DAC B input register and power down DAC

B. While powered down, on LDAC’s falling edge,

update both DAC registers. DAC A input register

unchanged.

X

X

1

X

1

1

1

1

8-Bit DAC Data

1

Load both DAC input registers and power down

both DACs. While powered down, on LDAC’s

falling edge, update both DAC registers.

X

COMMAND

(Commands executed on CS’s rising edge)

LDAC

DATA BYTE

Loaded Last

Loaded First

Pin 6

D7........D0

UB1

A0

A1

C0

C1

C2

UB3

UB2

COMMANDS POWERING DOWN AND LOADING INPUT REGISTER(S) ONLY

COMMANDS POWERING DOWN AND UPDATING DAC REGISTER(S)

COMMANDS POWERING DOWN AND UTILIZING THE ASYNCHRONOUS LOAD FUNCTION