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MAX5865E/D Datasheet(PDF) 13 Page - Maxim Integrated Products |
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MAX5865E/D Datasheet(HTML) 13 Page - Maxim Integrated Products |
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13 / 26 page ![]() Detailed Description The MAX5865 integrates dual 8-bit receive ADCs and dual 10-bit transmit DACs while providing ultra-low power and highest dynamic performance at a conver- sion rate of 40Msps. The ADCs’ analog input amplifiers are fully differential and accept 1VP-P full-scale signals. The DACs’ analog outputs are fully differential with ±400mV full-scale output range at 1.4V common mode. The MAX5865 includes a 3-wire serial interface to con- trol operating modes and power management. The ser- ial interface is SPI™ and MICROWIRE™ compatible. The MAX5865 serial interface selects shutdown, idle, standby, transmit, receive, and transceiver modes. The MAX5865 can operate in FDD or TDD applications by configuring the device for transmit, receive, or trans- ceiver modes through a 3-wire serial interface. In TDD mode, the digital bus for receive ADC and transmit DAC can be shared to reduce the digital I/O to a single 10-bit parallel multiplexed bus. In FDD mode, the MAX5865 digital I/O can be configured for an 18-bit, parallel multiplexed bus to match the dual 8-bit ADC and dual 10-bit DAC. The MAX5865 features an internal precision 1.024V bandgap reference that is stable over the entire power- supply and temperature ranges. Ultra-Low-Power, High-Dynamic- Performance, 40Msps Analog Front End ______________________________________________________________________________________ 13 SPI is a trademark of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. Figure 1. MAX5865 ADC Internal T/H Circuits S3b S3a COM S5b S5a QA+ QA- S1 OUT OUT C2a C2b S4c S4a S4b C1b C1a INTERNAL BIAS INTERNAL BIAS COM HOLD HOLD CLK INTERNAL NONOVERLAPPING CLOCK SIGNALS TRACK TRACK S2a S2b S3b S3a COM S5b S5a IA+ IA- S1 OUT OUT C2a C2b S4c S4a S4b C1b C1a INTERNAL BIAS INTERNAL BIAS COM S2a S2b MAX5865 |
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