the output capacitor. Output current is limited by the 2A

MOSFET current limit and the MAX618’s package

power-dissipation limit. See the

Maximum Output

Current section for details.

In Idle Mode, the MAX618 improves light-load efficien-

cy by reducing inductor current and skipping cycles to

reduce the losses in the internal switch, diode, and

inductor. In this mode, a switching cycle initiates only

when the error comparator senses that the output volt-

age is about to drop out of regulation. When this

occurs, the NMOS switch turns on and remains on until

the inductor current exceeds the nominal 350mA Idle

Mode current limit.

Refer to Table 1 for an estimate of load currents at which

the MAX618 transitions between PWM and Idle Mode.

Compensation Scheme

Although the higher loop gain of voltage-controlled

architectures tends to provide tighter load regulation,

current-controlled architectures are generally easier to

compensate over wide input and output voltage

ranges. The MAX618 uses both control schemes in par-

allel: the dominant, low-frequency components of the

error signal are tightly regulated with a voltage-control

loop, while a current-control loop improves stability at

higher frequencies. Compensation is achieved through

and its ESR. Refer to the

Capacitor Selection section for

guidance on selecting these capacitors.

VL Low-Dropout Regulator

The MAX618 contains a 3.1V low-dropout linear regula-

tor to power internal circuitry. The regulator’s input is IN

and its output is VL. The IN to VL dropout voltage is

100mV, so that when IN is less than 3.2V, VL is typically

100mV below IN. The MAX618 still operates when the

LDO is in dropout, as long as VL remains above the

2.7V undervoltage lockout. Bypass VL with a 4.7µF

ceramic capacitor placed as close to the VL and GND

pins as possible.

28V, PWM, Step-Up DC-DC Converter

6

_______________________________________________________________________________________

SHDN

MAX618

IDLE MODE

CURRENT LIMIT

PWM

CURRENT LIMIT

ERROR

COMPARATOR

250kHz

OSCILLATOR

SLOPE

COMPENSATION

LINEAR

REGULATOR

CURRENT-

SENSE

CIRCUIT

PGND

IN

LX

OUT

R

14R

VL

FB

COMP

IN

VL

NMOS

REFERENCE

INTEGRATOR

GND

SHUTDOWN

PWM

LOGIC

THERMAL

SHUTDOWN

Figure 2. Functional Diagram