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CMX910 Datasheet(PDF) 49 Page - CML Microcircuits

Part # CMX910
Description  Flexible Signal Channels
PDF  61 Pages
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Manufacturer  CMLMICRO [CML Microcircuits]
Direct Link  http://www.cmlmicro.com
Logo CMLMICRO - CML Microcircuits

CMX910 Datasheet(HTML) 49 Page - CML Microcircuits

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AIS Baseband Processor
CMX910
© 2009 CML Microsystems Plc
49
D/910/6
5.11
C-BUS Expansion Port
The C-BUS expansion port facilitates the connection of the host µC to as many as six additional C-BUS
compatible devices, while only requiring one additional C-BUS chip select pin. To operate the expansion
port, the µC writes to the CBUS_Expand register through the CMX910’s normal C-BUS port (SCLK,
CDATA, CSN) – this can be done even when the CMX910’s internal clocks are disabled. Subsequently,
for each bit set in bits 5-0 of the CBUS_Expand register, taking the chip select expansion input (CSXN)
low will cause the associated EXP5N – EXP0N output pin to go low. Each of the EXP5N – EXP0N pins
can be connected to the (active low) chip-select input of another C-BUS compatible device. Usually only
one bit in the CBUS_Expand register would be set high at a time. Setting more than one bit high may
cause simultaneous selection of a number of C-BUS devices; in that case, care must be taken to avoid
contention if a common RDATA line is used.
If expansion of the C-BUS is not required, the outputs EXP5N – EXP0N can be used as general purpose
digital outputs by holding CSXN low and writing the required data pattern to the CBUS_Expand register.
The data will then appear on the EXP5N-EXP0N pins in inverted form.
CBUS_Expand register: 8-bit write only.
C-BUS Address $A0
All bits cleared to 0 on reset.
This register can be written while the CMX910’s internal clocks are disabled.
Bit:
7
6
5
4
3
2
1
0
Reserved,
set to 00
EXP5N
enab
EXP4N
enab
EXP3N
enab
EXP2N
enab
EXP1N
enab
EXP0N
enab
CBUS_Expand register b5-0: EXP5N – EXP0N Expansion Bus Enable
Each bit that is set to 1 causes the corresponding EXP5N – EXP0N output pin to be driven low
when the CSXN input pin is driven low. Bits that are set to 0 cause the corresponding EXP5N –
EXP0N output pin to be held high.



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