SC70, 5ns, Low-Power, Single-Supply,

Precision TTL Comparators

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7

Detailed Description

These high-speed comparators have a unique design

that prevents oscillation when the comparator is in its

linear region, so no minimum input slew rate is required.

Many high-speed comparators oscillate in their linear

region. One common way to overcome this oscillation is

to add hysteresis, but it results in a loss of resolution

and bandwidth.

Latch Function

The MAX9011/MAX9013 provide a TTL-compatible latch

function that holds the comparator output state (Figure 1).

With LE driven to a TTL low or grounded, the latch is

transparent and the output state is determined by the

input differential voltage. When LE is driven to a TTL high,

the existing output state is latched, and the input differen-

tial voltage has no further effect on the output state.

Input Amplifier

A comparator can be thought of as having two sec-

tions: an input amplifier and a logic interface. The input

amplifiers of these devices are fully differential, with

input offset voltages typically 0.7mV at +25°C. Input

common-mode range extends from 200mV below

ground to 1.9V below the positive power-supply rail. The

total common-mode range is 3.3V when operating from a

5V supply. The amplifiers have no built-in hysteresis. For

highest accuracy, do not add hysteresis. Figure 2 shows

how hysteresis degrades resolution.

Input Voltage Range

Although the common-mode input voltage range is

can go to either absolute maximum voltage limit, i.e.,

parator will make a correct (and fast) logic decision

provided that at least one of the two inputs is within the

specified common-mode range. If both inputs are out-

side the common-mode range, the comparator output

state is indeterminate.

Resolution

A comparator’s ability to resolve a small-signal differ-

ence, its resolution, is affected by various factors. As

with most amplifiers and comparators, the most signifi-

common-mode and power-supply rejection ratios

(CMRR, PSRR). If source impedance is high, input off-

set current can be significant. If source impedance is

unbalanced, the input bias current can introduce

another error. For high-speed comparators, an addi-

PIN

MAX9010

MAX9011

MAX9012

MAX9013

NAME

FUNCTION

11

—

7

OUT

Comparator Output. OUT is high when IN+ is more

positive than IN-.

2

2

5

6

GND

Ground

33

—

2

IN+

Noninverting Input

44

—

3

IN-

Inverting Input

5, 6

6

8

1

Positive Power-Supply Voltage. Pins 5 and 6 of the

MAX9010 must BOTH be connected to the power-

supply rail. Bypass with a 0.1µF capacitor.

—

5

—

5

LE

Latch Enable Input

——

1

—

INA+

Noninverting Input, Channel A

——

2

—

INA-

Inverting Input, Channel A

——

3

—

INB+

Noninverting Input, Channel B

——

4

—

INB-

Inverting Input, Channel B

——

6

—

OUTB

Comparator Output, Channel B

——

7

—

OUTA

Comparator Output, Channel A

———

4

N.C.

No Connection. Not internally connected. Connect to

GND for best results.

———

8

OUT

Comparator Complementary Output

Pin Description