16F628 datasheet(103/168 Pages) MICROCHIP

103 / 168 page

 2002 Microchip Technology Inc.

Preliminary

DS40044A-page 101

PIC16F627A/628A/648A

TABLE 14-7:

INITIALIZATION CONDITION FOR REGISTERS

Address

Power-on

Reset

• MCLR Reset during normal

operation

• MCLR Reset during SLEEP

• WDT Reset

• Brown-out Reset (1)

• Wake-up from SLEEP(7)

through interrupt

• Wake-up from SLEEP(7)

through WDT time out

W—

xxxx xxxx

uuuu uuuu

INDF

00h

—

TMR0

01h, 101h

xxxx xxxx

uuuu uuuu

PCL

02h, 82h,

102h, 182h

0000 0000

PC + 1(3)

STATUS

03h, 83h,

103h, 183h

0001 1xxx

000q quuu(4)

uuuq 0uuu(4)

FSR

04h, 84h,

104h, 184h

xxxx xxxx

uuuu uuuu

PORTA

05h

xxxx 0000

uuuu uuuu

PORTB

06h, 106h

xxxx xxxx

uuuu uuuu

PCLATH

0Ah, 8Ah,

10Ah, 18Ah

---0 0000

---u uuuu

INTCON

0Bh, 8Bh,

10Bh,18Bh

0000 000x

0000 000u

uuuu uqqq(2)

PIR1

0Ch

0000 -000

qqqq -qqq(2)

TMR1L

0Eh

xxxx xxxx

uuuu uuuu

TMR1H

0Fh

xxxx xxxx

uuuu uuuu

T1CON

10h

--00 0000

--uu uuuu(6)

--uu uuuu

TMR2

11h

0000 0000

uuuu uuuu

T2CON

12h

-000 0000

-uuu uuuu

CCPR1L

15h

xxxx xxxx

uuuu uuuu

CCPR1H

16h

xxxx xxxx

uuuu uuuu

CCP1CON

17h

--00 0000

--uu uuuu

RCSTA

18h

0000 000x

uuuu uuuu

TXREG

19h

0000 0000

uuuu uuuu

RCREG

1Ah

0000 0000

uuuu uuuu

CMCON

1Fh

0000 0000

uu-- uuuu

OPTION

81h,181h

1111 1111

uuuu uuuu

TRISA

85h

1111 1111

uuuu uuuu

TRISB

86h, 186h

1111 1111

uuuu uuuu

PIE1

8Ch

0000 -000

uuuu -uuu

PCON

8Eh

---- 1-0x

---- 1-uq(1,5)

---- u-uu

PR2

92h

1111 1111

uuuu uuuu

TXSTA

98h

0000 -010

uuuu -uuu

SPBRG

99h

0000 0000

uuuu uuuu

EEDATA

9Ah

xxxx xxxx

uuuu uuuu

EEADR

9Bh

xxxx xxxx

uuuu uuuu

EECON1

9Ch

---- x000

---- q000

---- uuuu

EECON2

9Dh

—

VRCON

9Fh

000- 0000

uuu- uuuu

Legend:

= unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.

Note

1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.

2: One or more bits in INTCON and PIR1 will be affected (to cause wake-up).

3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).

4: See Table 14-6 for RESET value for specific condition.

5: If RESET was due to brown-out, then bit 0 = 0. All other RESETS will cause bit 0 = u.

6: Reset to ‘--00 0000’ on a Brown-out Reset (BOR).

7: Peripherals generating interrupts for wake-up from SLEEP will change the resulting bits in the associated registers.

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