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16F628 Datasheet(PDF) 163 Page - Microchip Technology |
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16F628 Datasheet(HTML) 163 Page - Microchip Technology |
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163 / 168 page ![]() 2002 Microchip Technology Inc. Preliminary DS40044A-page 161 PIC16F627A/628A/648A INDEX A A/D Special Event Trigger (CCP)....................................... 57 Absolute Maximum Ratings .............................................. 131 ADDLW Instruction ........................................................... 113 ADDWF Instruction ........................................................... 113 ANDLW Instruction ........................................................... 113 ANDWF Instruction ........................................................... 113 Architectural Overview .......................................................... 9 Assembler MPASM Assembler ................................................... 125 B Baud Rate Error .................................................................. 71 Baud Rate Formula ............................................................. 71 BCF Instruction ................................................................. 114 Block Diagrams Comparator I/O Operating Modes .......................................... 62 Modified Comparator Output .............................. 64 I/O Ports RB0/INT Pin ........................................................ 37 RB1/RX/DT Pin ................................................... 37 RB2/TX/CK Pin ................................................... 38 RB3/CCP1 Pin .................................................... 38 RB4/PGM Pin ..................................................... 39 RB5 Pin............................................................... 40 RB6/T1OSO/T1CKI Pin ...................................... 41 RB7/T1OSI Pin ................................................... 42 RC Oscillator Mode..................................................... 96 USART Receive .......................................................... 79 USART Transmit ......................................................... 77 BRGH bit ............................................................................. 71 Brown-Out Reset (BOR) ..................................................... 98 BSF Instruction ................................................................. 114 BTFSC Instruction............................................................. 114 BTFSS Instruction ............................................................. 115 C CALL Instruction ............................................................... 115 Capture (CCP Module) ....................................................... 56 Block Diagram............................................................. 56 CCP Pin Configuration................................................ 56 CCPR1H:CCPR1L Registers...................................... 56 Changing Between Capture Prescalers...................... 56 Prescaler..................................................................... 56 Software Interrupt ....................................................... 56 Timer1 Mode Selection ............................................... 56 Capture/Compare/PWM (CCP)........................................... 55 Capture Mode. See Capture CCP1 .......................................................................... 55 CCPR1H Register............................................... 55 CCPR1L Register ............................................... 55 CCP2 .......................................................................... 55 Compare Mode. See Compare PWM Mode. See PWM Timer Resources......................................................... 55 CCP1CON Register CCP1M3:CCP1M0 Bits ............................................... 55 CCP1X:CCP1Y Bits .................................................... 55 CCP2CON Register CCP2M3:CCP2M0 Bits ............................................... 55 CCP2X:CCP2Y Bits .................................................... 55 Clocking Scheme/Instruction Cycle .................................... 13 CLRF Instruction............................................................... 115 CLRW Instruction.............................................................. 116 CLRWDT Instruction......................................................... 116 Code Examples Data EEPROM Refresh Routine ................................ 92 Code Protection ................................................................ 108 COMF Instruction.............................................................. 116 Comparator Block Diagrams I/O Operating Modes .......................................... 62 Modified Comparator Output .............................. 64 Comparator Module .................................................... 61 Configuration .............................................................. 62 Interrupts .................................................................... 65 Operation.................................................................... 63 Reference ................................................................... 63 Compare (CCP Module) ..................................................... 56 Block Diagram ............................................................ 56 CCP Pin Configuration ............................................... 57 CCPR1H:CCPR1L Registers ..................................... 56 Software Interrupt ....................................................... 57 Special Event Trigger ................................................. 57 Timer1 Mode Selection............................................... 57 Configuration Bits ............................................................... 93 Crystal Operation................................................................ 95 D Data EEPROM Memory...................................................... 89 EECON1 Register ...................................................... 89 EECON2 Register ...................................................... 89 Operation During Code Protection ............................. 92 Reading ...................................................................... 91 Spurious Write Protection ........................................... 91 Using .......................................................................... 92 Write Verify ................................................................. 91 Writing to .................................................................... 91 Data Memory Organization................................................. 15 DECF Instruction .............................................................. 116 DECFSZ Instruction.......................................................... 117 Development Support ....................................................... 125 Development Tool Version Requirements ........................ 157 Device Differences............................................................ 155 Device Migrations ............................................................. 156 Dual-speed Oscillator Modes.............................................. 97 E EECON1 register ................................................................ 90 EECON2 register ................................................................ 90 Errata .................................................................................... 3 External Crystal Oscillator Circuit ....................................... 95 G General-Purpose Register File ........................................... 15 GOTO Instruction.............................................................. 117 I I/O Ports ............................................................................. 31 Bi-Directional .............................................................. 44 Block Diagrams RB0/INT Pin........................................................ 37 RB1/RX/DT Pin................................................... 37 RB2/TX/CK Pin................................................... 38 RB3/CCP1 Pin.................................................... 38 RB4/PGM Pin ..................................................... 39 |
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