PCA9622 datasheet(29/40 Pages) PHILIPS

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PCA9622

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Product data sheet

Rev. 5 — 2 June 2014

29 of 40

NXP Semiconductors

PCA9622

16-bit Fm+ I2C-bus 100 mA 40 V LED driver

14. Dynamic characteristics

[1]

tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.

Table 18.

Dynamic characteristics

Symbol Parameter

Conditions

Standard-mode

I2C-bus

Fast-mode I2C-bus

Fast-mode

Plus I2C-bus

Unit

Min

Max

Min

Max

Min

Max

fSCL

SCL clock frequency

100

400

1000

kHz

tBUF

bus free time between

a STOP and START

condition

4.7

1.3

0.5

s

tHD;STA

hold time (repeated)

START condition

4.0

0.6

0.26

s

tSU;STA

set-up time for a

repeated START

condition

4.7

0.6

0.26

s

tSU;STO

set-up time for STOP

condition

4.0

0.6

0.26

s

tHD;DAT

data hold time

tVD;ACK

data valid acknowledge

time

[1]

0.3

3.45

0.1

0.9

0.05

0.45

s

tVD;DAT

data valid time

[2]

0.3

3.45

0.1

0.9

0.05

0.45

s

tSU;DAT

data set-up time

250

100

tLOW

LOW period of the SCL

clock

4.7

1.3

0.5

s

tHIGH

HIGH period of the

SCL clock

4.0

0.6

0.26

s

fall time of both SDA

and SCL signals

[3][4]

-300

20 + 0.1Cb[5]

300

120

rise time of both SDA

and SCL signals

1000

20 + 0.1Cb[5]

300

120

tSP

pulse width of spikes

that must be

suppressed by the

input filter

[6]

-50

Output propagation delay

tPLH

LOW to HIGH

propagation delay

OE to LEDn;

MODE2[1:0] = 01

150

tPHL

HIGH to LOW

propagation delay

OE to LEDn;

MODE2[1:0] = 01

150

Output port timing

td(SCL-Q) delay time from SCL

to data output

SCL to LEDn;

MODE2[3] = 1;

outputs change on

ACK

450

td(SDA-Q) delay time from SDA

to data output

SDA to LEDn;

MODE2[3] = 0;

outputs change on

STOP condition

450

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