6 GND

TOP VIEW

SW 2

EN 3

BOTTOM VIEW

VIN 1

5 SW

4 FB

6 GND

5 SW

4 FB

VIN 1

SW 2

EN 3

Top View

Bottom View

A1

A3

Vin

EN

FB

SW

GND

Vin

EN

GND

SW

FB

C1

C3

B2

A3

A1

C3

C1

B2

LM3677

SNVS502F – MARCH 2007 – REVISED MAY 2013

www.ti.com

DESCRIPTION (CONTINUED)

The device offers superior features and performance for mobile phones and similar portable applications with

complex power management systems. Automatic intelligent switching between PWM low-noise and PFM low-

current mode offers improved system control. During PWM mode operation, the device operates at a fixed

frequency of 3 MHz (typ). PWM mode drives loads from ~ 80 mA to 600 mA max. Hysteretic PFM mode extends

the battery life by reducing the quiescent current to 16 µA (typ.) during light load and standby operation. Internal

synchronous rectification provides high efficiency. In shutdown mode (Enable pin pulled down), the device turns

off and reduces battery consumption to 0.01 µA (typ.).

The LM3677 is available in a lead-free (NOPB) 5-bump DSBGA package and 6-pin USON package. A switching

frequency of 3 MHz (typ.) allows use of tiny surface-mount components. Only three external surface-mount

components, an inductor and two ceramic capacitors, are required.

CONNECTION DIAGRAMS

5-Bump DSBGA Package

See Package Number YZR0005

6-Pin USON Package

See Package Number NGE0006A

Name

Pin No.

Description

A1

1

Power supply input. Connect to the input filter capacitor (Figure 1).

GND

A3

6

Ground pin.

EN

C1

3

Enable pin. The device is in shutdown mode when voltage to this pin is < 0.4V and

enabled when > 1.0V. Do not leave this pin floating.

FB

C3

4

Feedback analog input. Connect directly to the output filter capacitor ( FIGURE 1).

SW

B2

2, 5

Switching node connection to the internal PFET switch and NFET synchronous

rectifier.

(1)

For output voltage 1.2V or lower, input voltage needs to be derated to the range of 2.7V to 5.0V in order to perform within specification.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

2

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