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ML6430 Datasheet(PDF) 6 Page - Micro Linear Corporation |
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ML6430 Datasheet(HTML) 6 Page - Micro Linear Corporation |
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6 / 33 page ![]() ML6430/ML6431 6 GENLOCK PERFORMANCE SPECIFICATIONS Unless otherwise noted, VIN = 1 VPP NTSC test signal for composite inputs, or 100% color bars for component (Note 1). See Figure 1 for parameter measurement definition PARAMETER CONDITIONS MIN TYP MAX UNITS SYNC SEPARATION Min Sync Amplitude 135 mV Max Video Amplitude 3V Clamp timing error NTC7 AC bounce signal (Note 2) 10 ns Clamp Recovery TIme NTC7 DC bounce signal (Note 3) 16 µs CLOCK RECOVERY Short Term Output Jitter Rejection Input jitter = 50ns RMS –15 dB RMS Residual Output Clock Jitter Input jitter <1ns RMS 600 ps Peak to Peak (6 s), Line to Line Jitter Input Jitter < 1ns 2.0 2.2 ns Head Switch Recovery Time to 1ns Error 5µs step H change on or before 4 lines line 1 Step Frequency Recovery Time to 1ns Error 1% step H frequency change on or 12 15 ms before line 1 Missing Sync Sensitivity (Note 4) 1.0 ns Sync Glitch Sensitivity (Note 5) 1.0 ns 4X Clock Duty Cycle CLOAD = 50pF, fCLK4X < 60MHz 40 60 % 2X Clock Duty Cycle CLOAD = 50pF, fCLK2X < 30MHz 48 52 % 1X Clock Duty Cycle CLOAD = 50pF, fCLK1X < 15MHz 48 52 % Clock Skew — 1X to 2X CLOAD = 50pF, fCLK1X < 15MHz 6 ns Pulse Output Rise Time CLOAD = 50pF 2 10 ns Pulse Output Fall Time CLOAD = 50pF 2 10 ns Pulse Output Setup Time CLOAD = 50pF 20 ns Pulse Output Hold Time CLOAD = 50pF 20 ns SERIAL BUS PARAMETER CONDITIONS MIN TYP MAX UNITS INPUT Low Level Input Voltage 0 0.8 V High Level Input Voltage VCC – 0.8 VCC V Low Level Input Current VIN = 0V 1.0 mA High Level Input Current VIN = VCC D 1.0 mA Input Impedance fCLK = 100kHz 1 M W Input Capacitance (CIN) 2pF SYSTEM TIMING SCLK Frequency (fCLOCK) 100 kHz Input Hysteresis (VHYS) 0.2 V Spike Suppression (tSPIKE) Max length for zero response 50 ns Power Setup Time to Valid Data Inputs VCC Settled to Within 1% 10 ms |
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