A25LS512A datasheet(27/43 Pages) AMICC

27 / 43 page

A25LS512A Series

(November, 2014, Version 1.1)

AMIC Technology Corp.

Figure 20. Release from Deep Power-down (RES) Instruction Sequence

DIO

1 2 3 45 6 7

Instruction

RES1

High Impedance

Stand-by Mode

Deep Power-down Mode

Driving Chip Select ( S ) High after the 8-bit instruction byte

has been received by the device, but before the whole of the

8-bit Electronic Signature has been transmitted for the first

time (as shown in Figure 20.), still insures that the device is

put into Stand-by Power mode. If the device was not pre-

viously in the Deep Power-down mode, the transition to the

Stand-by Power mode is immediate. If the device was

previously in the Deep Power-down mode, though, the

transition to the Stand-by Power mode is delayed by tRES1,

and Chip Select ( S ) must remain High for at least tRES1 (max),

as specified in AC Characteristics Table. Once in the

Stand-by Power mode, the device waits to be selected, so

that it can receive, decode and execute instructions.

A25LS512A Datasheet(PDF) 27 Page - AMIC Technology